Loading drivers/platform/msm/ipa/ipa.c +3 −1 Original line number Diff line number Diff line Loading @@ -1645,6 +1645,8 @@ int _ipa_init_sram_v2_5(void) #define IPA_SRAM_SET(ofst, val) (ipa_sram_mmio[(ofst - 4) / 4] = val) IPA_SRAM_SET(IPA_MEM_PART(v4_flt_ofst) - 4, IPA_MEM_CANARY_VAL); IPA_SRAM_SET(IPA_MEM_PART(v4_flt_ofst), IPA_MEM_CANARY_VAL); IPA_SRAM_SET(IPA_MEM_PART(v6_flt_ofst) - 4, IPA_MEM_CANARY_VAL); IPA_SRAM_SET(IPA_MEM_PART(v6_flt_ofst), IPA_MEM_CANARY_VAL); IPA_SRAM_SET(IPA_MEM_PART(v4_rt_ofst) - 4, IPA_MEM_CANARY_VAL); Loading @@ -1656,7 +1658,7 @@ int _ipa_init_sram_v2_5(void) IPA_SRAM_SET(IPA_MEM_PART(modem_hdr_proc_ctx_ofst), IPA_MEM_CANARY_VAL); IPA_SRAM_SET(IPA_MEM_PART(modem_ofst), IPA_MEM_CANARY_VAL); IPA_SRAM_SET(IPA_MEM_PART(apps_v4_flt_ofst), IPA_MEM_CANARY_VAL); IPA_SRAM_SET(IPA_MEM_PART(uc_info_ofst), IPA_MEM_CANARY_VAL); IPA_SRAM_SET(IPA_MEM_PART(end_ofst), IPA_MEM_CANARY_VAL); iounmap(ipa_sram_mmio); Loading drivers/platform/msm/ipa/ipa_ram_mmap.h +23 −15 Original line number Diff line number Diff line Loading @@ -202,6 +202,12 @@ /* * IPA v2.5 SRAM memory layout: * +----------------+ * | UC INFO | * +----------------+ * | CANARY | * +----------------+ * | CANARY | * +----------------+ * | V4 FLT HDR | * +----------------+ * | CANARY | Loading Loading @@ -246,11 +252,22 @@ * +----------------+ * | CANARY | * +----------------+ * | UC INFO | * +----------------+ */ #define IPA_MEM_v2_5_RAM_OFST_START 128 #define IPA_MEM_v2_5_RAM_V4_FLT_OFST IPA_MEM_v2_5_RAM_OFST_START #define IPA_MEM_v2_5_RAM_UC_MEM_SIZE 128 #define IPA_MEM_v2_5_RAM_UC_INFO_OFST IPA_MEM_v2_5_RAM_UC_MEM_SIZE #define IPA_MEM_v2_5_RAM_UC_INFO_SIZE 512 /* uC info 4B aligned */ #if (IPA_MEM_v2_5_RAM_UC_INFO_OFST & 3) #error uC info is not 4B aligned #endif #define IPA_MEM_v2_5_RAM_OFST_START (IPA_MEM_v2_5_RAM_UC_INFO_OFST + \ IPA_MEM_v2_5_RAM_UC_INFO_SIZE) #define IPA_MEM_v2_5_RAM_V4_FLT_OFST (IPA_MEM_v2_5_RAM_OFST_START + \ 2 * IPA_MEM_CANARY_SIZE) #define IPA_MEM_v2_5_RAM_V4_FLT_SIZE 88 /* V4 filtering header table is 8B aligned */ Loading Loading @@ -310,7 +327,7 @@ #define IPA_MEM_v2_5_RAM_APPS_HDR_OFST (IPA_MEM_v2_5_RAM_MODEM_HDR_OFST + \ IPA_MEM_v2_5_RAM_MODEM_HDR_SIZE) #define IPA_MEM_v2_5_RAM_APPS_HDR_SIZE 72 #define IPA_MEM_v2_5_RAM_APPS_HDR_SIZE 0 /* header table is 8B aligned */ #if (IPA_MEM_v2_5_RAM_APPS_HDR_OFST & 7) Loading Loading @@ -364,17 +381,8 @@ #error filtering rule is not 4B aligned #endif #define IPA_MEM_v2_5_RAM_UC_INFO_OFST (IPA_MEM_v2_5_RAM_APPS_V6_FLT_OFST + \ #define IPA_MEM_v2_5_RAM_END_OFST (IPA_MEM_v2_5_RAM_APPS_V6_FLT_OFST + \ IPA_MEM_v2_5_RAM_APPS_V6_FLT_SIZE + IPA_MEM_CANARY_SIZE) #define IPA_MEM_v2_5_RAM_UC_INFO_SIZE 292 /* uC info 4B aligned */ #if (IPA_MEM_v2_5_RAM_UC_INFO_OFST & 3) #error uC info is not 4B aligned #endif #define IPA_MEM_v2_5_RAM_END_OFST (IPA_MEM_v2_5_RAM_UC_INFO_OFST + \ IPA_MEM_v2_5_RAM_UC_INFO_SIZE) #define IPA_MEM_v2_5_RAM_APPS_V4_RT_OFST IPA_MEM_v2_5_RAM_END_OFST #define IPA_MEM_v2_5_RAM_APPS_V4_RT_SIZE 0 #define IPA_MEM_v2_5_RAM_APPS_V6_RT_OFST IPA_MEM_v2_5_RAM_END_OFST Loading drivers/platform/msm/ipa/ipa_utils.c +5 −5 Original line number Diff line number Diff line Loading @@ -3935,6 +3935,11 @@ static void ipa_init_mem_partition_v2_5(void) IPADBG("NAT OFST 0x%x SIZE 0x%x\n", IPA_MEM_PART(nat_ofst), IPA_MEM_PART(nat_size)); IPA_MEM_PART(uc_info_ofst) = IPA_MEM_v2_5_RAM_UC_INFO_OFST; IPA_MEM_PART(uc_info_size) = IPA_MEM_v2_5_RAM_UC_INFO_SIZE; IPADBG("UC INFO OFST 0x%x SIZE 0x%x\n", IPA_MEM_PART(uc_info_ofst), IPA_MEM_PART(uc_info_size)); IPA_MEM_PART(ofst_start) = IPA_MEM_v2_5_RAM_OFST_START; IPADBG("RAM OFST 0x%x\n", IPA_MEM_PART(ofst_start)); Loading Loading @@ -4044,11 +4049,6 @@ static void ipa_init_mem_partition_v2_5(void) IPADBG("V6 APPS FLT OFST 0x%x SIZE 0x%x\n", IPA_MEM_PART(apps_v6_flt_ofst), IPA_MEM_PART(apps_v6_flt_size)); IPA_MEM_PART(uc_info_ofst) = IPA_MEM_v2_5_RAM_UC_INFO_OFST; IPA_MEM_PART(uc_info_size) = IPA_MEM_v2_5_RAM_UC_INFO_SIZE; IPADBG("V6 UC INFO OFST 0x%x SIZE 0x%x\n", IPA_MEM_PART(uc_info_ofst), IPA_MEM_PART(uc_info_size)); IPA_MEM_PART(end_ofst) = IPA_MEM_v2_5_RAM_END_OFST; IPA_MEM_PART(apps_v4_rt_ofst) = IPA_MEM_v2_5_RAM_APPS_V4_RT_OFST; IPA_MEM_PART(apps_v4_rt_size) = IPA_MEM_v2_5_RAM_APPS_V4_RT_SIZE; Loading Loading
drivers/platform/msm/ipa/ipa.c +3 −1 Original line number Diff line number Diff line Loading @@ -1645,6 +1645,8 @@ int _ipa_init_sram_v2_5(void) #define IPA_SRAM_SET(ofst, val) (ipa_sram_mmio[(ofst - 4) / 4] = val) IPA_SRAM_SET(IPA_MEM_PART(v4_flt_ofst) - 4, IPA_MEM_CANARY_VAL); IPA_SRAM_SET(IPA_MEM_PART(v4_flt_ofst), IPA_MEM_CANARY_VAL); IPA_SRAM_SET(IPA_MEM_PART(v6_flt_ofst) - 4, IPA_MEM_CANARY_VAL); IPA_SRAM_SET(IPA_MEM_PART(v6_flt_ofst), IPA_MEM_CANARY_VAL); IPA_SRAM_SET(IPA_MEM_PART(v4_rt_ofst) - 4, IPA_MEM_CANARY_VAL); Loading @@ -1656,7 +1658,7 @@ int _ipa_init_sram_v2_5(void) IPA_SRAM_SET(IPA_MEM_PART(modem_hdr_proc_ctx_ofst), IPA_MEM_CANARY_VAL); IPA_SRAM_SET(IPA_MEM_PART(modem_ofst), IPA_MEM_CANARY_VAL); IPA_SRAM_SET(IPA_MEM_PART(apps_v4_flt_ofst), IPA_MEM_CANARY_VAL); IPA_SRAM_SET(IPA_MEM_PART(uc_info_ofst), IPA_MEM_CANARY_VAL); IPA_SRAM_SET(IPA_MEM_PART(end_ofst), IPA_MEM_CANARY_VAL); iounmap(ipa_sram_mmio); Loading
drivers/platform/msm/ipa/ipa_ram_mmap.h +23 −15 Original line number Diff line number Diff line Loading @@ -202,6 +202,12 @@ /* * IPA v2.5 SRAM memory layout: * +----------------+ * | UC INFO | * +----------------+ * | CANARY | * +----------------+ * | CANARY | * +----------------+ * | V4 FLT HDR | * +----------------+ * | CANARY | Loading Loading @@ -246,11 +252,22 @@ * +----------------+ * | CANARY | * +----------------+ * | UC INFO | * +----------------+ */ #define IPA_MEM_v2_5_RAM_OFST_START 128 #define IPA_MEM_v2_5_RAM_V4_FLT_OFST IPA_MEM_v2_5_RAM_OFST_START #define IPA_MEM_v2_5_RAM_UC_MEM_SIZE 128 #define IPA_MEM_v2_5_RAM_UC_INFO_OFST IPA_MEM_v2_5_RAM_UC_MEM_SIZE #define IPA_MEM_v2_5_RAM_UC_INFO_SIZE 512 /* uC info 4B aligned */ #if (IPA_MEM_v2_5_RAM_UC_INFO_OFST & 3) #error uC info is not 4B aligned #endif #define IPA_MEM_v2_5_RAM_OFST_START (IPA_MEM_v2_5_RAM_UC_INFO_OFST + \ IPA_MEM_v2_5_RAM_UC_INFO_SIZE) #define IPA_MEM_v2_5_RAM_V4_FLT_OFST (IPA_MEM_v2_5_RAM_OFST_START + \ 2 * IPA_MEM_CANARY_SIZE) #define IPA_MEM_v2_5_RAM_V4_FLT_SIZE 88 /* V4 filtering header table is 8B aligned */ Loading Loading @@ -310,7 +327,7 @@ #define IPA_MEM_v2_5_RAM_APPS_HDR_OFST (IPA_MEM_v2_5_RAM_MODEM_HDR_OFST + \ IPA_MEM_v2_5_RAM_MODEM_HDR_SIZE) #define IPA_MEM_v2_5_RAM_APPS_HDR_SIZE 72 #define IPA_MEM_v2_5_RAM_APPS_HDR_SIZE 0 /* header table is 8B aligned */ #if (IPA_MEM_v2_5_RAM_APPS_HDR_OFST & 7) Loading Loading @@ -364,17 +381,8 @@ #error filtering rule is not 4B aligned #endif #define IPA_MEM_v2_5_RAM_UC_INFO_OFST (IPA_MEM_v2_5_RAM_APPS_V6_FLT_OFST + \ #define IPA_MEM_v2_5_RAM_END_OFST (IPA_MEM_v2_5_RAM_APPS_V6_FLT_OFST + \ IPA_MEM_v2_5_RAM_APPS_V6_FLT_SIZE + IPA_MEM_CANARY_SIZE) #define IPA_MEM_v2_5_RAM_UC_INFO_SIZE 292 /* uC info 4B aligned */ #if (IPA_MEM_v2_5_RAM_UC_INFO_OFST & 3) #error uC info is not 4B aligned #endif #define IPA_MEM_v2_5_RAM_END_OFST (IPA_MEM_v2_5_RAM_UC_INFO_OFST + \ IPA_MEM_v2_5_RAM_UC_INFO_SIZE) #define IPA_MEM_v2_5_RAM_APPS_V4_RT_OFST IPA_MEM_v2_5_RAM_END_OFST #define IPA_MEM_v2_5_RAM_APPS_V4_RT_SIZE 0 #define IPA_MEM_v2_5_RAM_APPS_V6_RT_OFST IPA_MEM_v2_5_RAM_END_OFST Loading
drivers/platform/msm/ipa/ipa_utils.c +5 −5 Original line number Diff line number Diff line Loading @@ -3935,6 +3935,11 @@ static void ipa_init_mem_partition_v2_5(void) IPADBG("NAT OFST 0x%x SIZE 0x%x\n", IPA_MEM_PART(nat_ofst), IPA_MEM_PART(nat_size)); IPA_MEM_PART(uc_info_ofst) = IPA_MEM_v2_5_RAM_UC_INFO_OFST; IPA_MEM_PART(uc_info_size) = IPA_MEM_v2_5_RAM_UC_INFO_SIZE; IPADBG("UC INFO OFST 0x%x SIZE 0x%x\n", IPA_MEM_PART(uc_info_ofst), IPA_MEM_PART(uc_info_size)); IPA_MEM_PART(ofst_start) = IPA_MEM_v2_5_RAM_OFST_START; IPADBG("RAM OFST 0x%x\n", IPA_MEM_PART(ofst_start)); Loading Loading @@ -4044,11 +4049,6 @@ static void ipa_init_mem_partition_v2_5(void) IPADBG("V6 APPS FLT OFST 0x%x SIZE 0x%x\n", IPA_MEM_PART(apps_v6_flt_ofst), IPA_MEM_PART(apps_v6_flt_size)); IPA_MEM_PART(uc_info_ofst) = IPA_MEM_v2_5_RAM_UC_INFO_OFST; IPA_MEM_PART(uc_info_size) = IPA_MEM_v2_5_RAM_UC_INFO_SIZE; IPADBG("V6 UC INFO OFST 0x%x SIZE 0x%x\n", IPA_MEM_PART(uc_info_ofst), IPA_MEM_PART(uc_info_size)); IPA_MEM_PART(end_ofst) = IPA_MEM_v2_5_RAM_END_OFST; IPA_MEM_PART(apps_v4_rt_ofst) = IPA_MEM_v2_5_RAM_APPS_V4_RT_OFST; IPA_MEM_PART(apps_v4_rt_size) = IPA_MEM_v2_5_RAM_APPS_V4_RT_SIZE; Loading