Merge "clk: mdss: add delay for new pll locking sequence"

drivers/clk/qcom/mdss/mdss-dsi-20nm-pll-util.c

+1 −0

Original line number	Diff line number	Diff line
		@@ -921,6 +921,7 @@ static void pll_20nm_config_vco_start(void __iomem *pll_base)

		MDSS_PLL_REG_W(pll_base, MMSS_DSI_PHY_PLL_PLL_VCOTAIL_EN, 0x03);
		MDSS_PLL_REG_W(pll_base, MMSS_DSI_PHY_PLL_RESETSM_CNTRL3, 0x02);
		udelay(10);
		MDSS_PLL_REG_W(pll_base, MMSS_DSI_PHY_PLL_RESETSM_CNTRL3, 0x03);
		}