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Commit e9c03e96 authored by Linux Build Service Account's avatar Linux Build Service Account Committed by Gerrit - the friendly Code Review server
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Merge "clock-rpm-8994: Add CE clock voters"

parents 7591fb47 15a17655

arch/arm/boot/dts/qcom/msm8994.dtsi

+3 −3
Original line number Diff line number Diff line
@@ -1367,7 +1367,7 @@ 
			<&clock_mmss clk_venus0_ahb_clk>,

			<&clock_mmss clk_venus0_axi_clk>,

			<&clock_mmss clk_venus0_ocmemnoc_clk>,

			<&clock_rpm clk_ce1_clk>;

			<&clock_rpm clk_scm_ce1_clk>;



		qcom,msm-bus,name = "pil-venus";

		qcom,msm-bus,num-cases = <2>;
@@ -1435,7 +1435,7 @@ 


		clocks = <&clock_gcc clk_gcc_lpass_q6_axi_clk>,

			 <&clock_rpm clk_cxo_pil_lpass_clk>,

			 <&clock_rpm clk_ce1_clk>;

			 <&clock_rpm clk_scm_ce1_clk>;

		clock-names = "bus_clk", "xo", "scm_ce1_clk";

		qcom,active-clock-names = "bus_clk";

		qcom,proxy-clock-names = "xo", "scm_ce1_clk";
@@ -2305,7 +2305,7 @@ 
				<55 512 120000 1200000>,

				<55 512 393600 3936000>;

		clock-names = "core_clk";

		clocks = <&clock_rpm clk_ce1_clk>;

		clocks = <&clock_rpm clk_qseecom_ce1_clk>;

	};



	qcom,sensor-information {

drivers/clk/qcom/clock-rpm-8994.c

+32 −0
Original line number Diff line number Diff line
@@ -127,14 +127,31 @@ DEFINE_CLK_RPM_SMD(ce1_clk, ce1_a_clk, RPM_CE_CLK_TYPE, 
		   CE1_CLK_ID, NULL);

DEFINE_CLK_DUMMY(gcc_ce1_ahb_m_clk, 0);

DEFINE_CLK_DUMMY(gcc_ce1_axi_m_clk, 0);

static DEFINE_CLK_VOTER(mcd_ce1_clk, &ce1_clk.c, 85710000);

static DEFINE_CLK_VOTER(qseecom_ce1_clk, &ce1_clk.c, 85710000);

static DEFINE_CLK_VOTER(scm_ce1_clk, &ce1_clk.c, 85710000);

static DEFINE_CLK_VOTER(qcedev_ce1_clk, &ce1_clk.c, 85710000);

static DEFINE_CLK_VOTER(qcrypto_ce1_clk, &ce1_clk.c, 85710000);



DEFINE_CLK_RPM_SMD(ce2_clk, ce2_a_clk, RPM_CE_CLK_TYPE,

		   CE2_CLK_ID, NULL);

DEFINE_CLK_DUMMY(gcc_ce2_ahb_m_clk, 0);

DEFINE_CLK_DUMMY(gcc_ce2_axi_m_clk, 0);

static DEFINE_CLK_VOTER(mcd_ce2_clk, &ce2_clk.c, 85710000);

static DEFINE_CLK_VOTER(qseecom_ce2_clk, &ce2_clk.c, 85710000);

static DEFINE_CLK_VOTER(scm_ce2_clk, &ce2_clk.c, 85710000);

static DEFINE_CLK_VOTER(qcedev_ce2_clk, &ce2_clk.c, 85710000);

static DEFINE_CLK_VOTER(qcrypto_ce2_clk, &ce2_clk.c, 85710000);



DEFINE_CLK_RPM_SMD(ce3_clk, ce3_a_clk, RPM_CE_CLK_TYPE,

		   CE3_CLK_ID, NULL);

DEFINE_CLK_DUMMY(gcc_ce3_ahb_m_clk, 0);

DEFINE_CLK_DUMMY(gcc_ce3_axi_m_clk, 0);

static DEFINE_CLK_VOTER(mcd_ce3_clk, &ce3_clk.c, 85710000);

static DEFINE_CLK_VOTER(qseecom_ce3_clk, &ce3_clk.c, 85710000);

static DEFINE_CLK_VOTER(scm_ce3_clk, &ce3_clk.c, 85710000);

static DEFINE_CLK_VOTER(qcedev_ce3_clk, &ce3_clk.c, 85710000);

static DEFINE_CLK_VOTER(qcrypto_ce3_clk, &ce3_clk.c, 85710000);



static struct mux_clk rpm_debug_mux = {

	.ops = &mux_reg_ops,
@@ -208,6 +225,9 @@ static struct clk_lookup msm_clocks_rpm_8994[] = { 
	CLK_LIST(ipa_a_clk),

	CLK_LIST(ln_bb_clk),

	CLK_LIST(ln_bb_a_clk),

	CLK_LIST(mcd_ce1_clk),

	CLK_LIST(mcd_ce2_clk),

	CLK_LIST(mcd_ce3_clk),

	CLK_LIST(mmssnoc_ahb_clk),

	CLK_LIST(mmssnoc_ahb_a_clk),

	CLK_LIST(ocmemgx_core_clk),
@@ -219,8 +239,17 @@ static struct clk_lookup msm_clocks_rpm_8994[] = { 
	CLK_LIST(pnoc_msmbus_a_clk),

	CLK_LIST(pnoc_pm_clk),

	CLK_LIST(pnoc_sps_clk),

	CLK_LIST(qcedev_ce1_clk),

	CLK_LIST(qcedev_ce2_clk),

	CLK_LIST(qcedev_ce3_clk),

	CLK_LIST(qcrypto_ce1_clk),

	CLK_LIST(qcrypto_ce2_clk),

	CLK_LIST(qcrypto_ce3_clk),

	CLK_LIST(qdss_clk),

	CLK_LIST(qdss_a_clk),

	CLK_LIST(qseecom_ce1_clk),

	CLK_LIST(qseecom_ce2_clk),

	CLK_LIST(qseecom_ce3_clk),

	CLK_LIST(rf_clk1),

	CLK_LIST(rf_clk1_ao),

	CLK_LIST(rf_clk1_pin),
@@ -229,6 +258,9 @@ static struct clk_lookup msm_clocks_rpm_8994[] = { 
	CLK_LIST(rf_clk2_ao),

	CLK_LIST(rf_clk2_pin),

	CLK_LIST(rf_clk2_pin_ao),

	CLK_LIST(scm_ce1_clk),

	CLK_LIST(scm_ce2_clk),

	CLK_LIST(scm_ce3_clk),

	CLK_LIST(snoc_msmbus_clk),

	CLK_LIST(snoc_msmbus_a_clk),

	CLK_LIST(ce1_clk),

include/dt-bindings/clock/msm-clocks-8994.h

+15 −0
Original line number Diff line number Diff line
@@ -57,6 +57,9 @@ 
#define clk_ipa_a_clk 0xeeec2919

#define clk_ln_bb_clk 0x3ab0b36d

#define clk_ln_bb_a_clk 0xc7257ea8

#define clk_mcd_ce1_clk 0xbb615d26

#define clk_mcd_ce2_clk 0x6ed5c723

#define clk_mcd_ce3_clk 0x607c2bd3

#define clk_mmssnoc_ahb_clk 0xccd4bd4c

#define clk_mmssnoc_ahb_a_clk 0x3f1a62ce

#define clk_ocmemgx_core_clk 0xaad7dbe5
@@ -68,8 +71,17 @@ 
#define clk_pnoc_msmbus_a_clk 0x8c9b4e93

#define clk_pnoc_pm_clk 0xd6f7dfb9

#define clk_pnoc_sps_clk 0xd482ecc7

#define clk_qcedev_ce1_clk 0x293f97b0

#define clk_qcedev_ce2_clk 0x816b3fec

#define clk_qcedev_ce3_clk 0xbfa406c1

#define clk_qcrypto_ce1_clk 0xa6ac14df

#define clk_qcrypto_ce2_clk 0x8728364d

#define clk_qcrypto_ce3_clk 0x0dce9a93

#define clk_qdss_clk 0x1492202a

#define clk_qdss_a_clk 0xdd121669

#define clk_qseecom_ce1_clk 0xaa858373

#define clk_qseecom_ce2_clk 0x7768a8d3

#define clk_qseecom_ce3_clk 0xf277bf96

#define clk_rf_clk1 0xaabeea5a

#define clk_rf_clk1_ao 0x72a10cb8

#define clk_rf_clk1_pin 0x8f463562
@@ -78,6 +90,9 @@ 
#define clk_rf_clk2_ao 0x944d8bbd

#define clk_rf_clk2_pin 0xa7c5602a

#define clk_rf_clk2_pin_ao 0x2d75eb4d

#define clk_scm_ce1_clk 0xd8ebcc62

#define clk_scm_ce2_clk 0x5f97c3fc

#define clk_scm_ce3_clk 0xc52c879f

#define clk_snoc_msmbus_clk 0xe6900bb6

#define clk_snoc_msmbus_a_clk 0x5d4683bd

#define clk_ce1_clk 0x42229c55