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Commit e881f89a authored by Linux Build Service Account's avatar Linux Build Service Account Committed by Gerrit - the friendly Code Review server
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Merge "msm: mdss: fix logic to flush timing engine"

parents 26a00c32 097f6b5b

drivers/video/msm/mdss/mdss_mdp_ctl.c

+4 −4
Original line number Diff line number Diff line
@@ -1649,9 +1649,6 @@ static inline int mdss_mdp_set_split_ctl(struct mdss_mdp_ctl *ctl, 
	 * original ctl can work the same way as dual pipe solution */

	ctl->mixer_right = split_ctl->mixer_left;



	if ((mdata->mdp_rev >= MDSS_MDP_HW_REV_103) && ctl->is_video_mode)

		ctl->split_flush_en = true;



	return 0;

}
@@ -2059,11 +2056,14 @@ static void mdss_mdp_ctl_split_display_enable(int enable, 
	writel_relaxed(enable, main_ctl->mdata->mdp_base +

		MDSS_MDP_REG_SPLIT_DISPLAY_EN);



	if (main_ctl->split_flush_en)

	if ((main_ctl->mdata->mdp_rev >= MDSS_MDP_HW_REV_103)

		&& main_ctl->is_video_mode) {

		main_ctl->split_flush_en = true;

		writel_relaxed(enable ? 0x1 : 0x0,

			main_ctl->mdata->mdp_base +

			MMSS_MDP_MDP_SSPP_SPARE_0);

	}

}



static void mdss_mdp_ctl_dst_split_display_enable(int enable,

	struct mdss_mdp_ctl *ctl)

drivers/video/msm/mdss/mdss_mdp_intf_video.c

+7 −16
Original line number Diff line number Diff line
@@ -126,8 +126,6 @@ static int mdss_mdp_video_timegen_setup(struct mdss_mdp_ctl *ctl, 
	u32 den_polarity, hsync_polarity, vsync_polarity;

	u32 display_hctl, active_hctl, hsync_ctl, polarity_ctl;

	struct mdss_mdp_video_ctx *ctx;

	struct mdss_mdp_ctl *sctl = NULL;

	u32 flush_bits;



	ctx = ctl->priv_data;

	hsync_period = p->hsync_pulse_width + p->h_back_porch +
@@ -145,16 +143,9 @@ static int mdss_mdp_video_timegen_setup(struct mdss_mdp_ctl *ctl, 
		display_v_end -= p->h_front_porch;

	}



	sctl = mdss_mdp_get_split_ctl(ctl);



	flush_bits = mdss_mdp_ctl_read(ctl, MDSS_MDP_REG_CTL_FLUSH);

	flush_bits |= BIT(31) >>

	ctl->flush_bits |= BIT(31) >>

		(ctl->intf_num - MDSS_MDP_INTF0);



	if (sctl)

		flush_bits |= BIT(31) >>

			(sctl->intf_num - MDSS_MDP_INTF0);



	hsync_start_x = p->h_back_porch + p->hsync_pulse_width;

	hsync_end_x = hsync_period - p->h_front_porch - 1;
@@ -220,7 +211,6 @@ static int mdss_mdp_video_timegen_setup(struct mdss_mdp_ctl *ctl, 
	mdp_video_write(ctx, MDSS_MDP_REG_INTF_HSYNC_SKEW, p->hsync_skew);

	mdp_video_write(ctx, MDSS_MDP_REG_INTF_POLARITY_CTL, polarity_ctl);

	mdp_video_write(ctx, MDSS_MDP_REG_INTF_FRAME_LINE_COUNT_EN, 0x3);

	mdss_mdp_ctl_write(ctl, MDSS_MDP_REG_CTL_FLUSH, flush_bits);



	return 0;

}
@@ -985,6 +975,7 @@ static int mdss_mdp_video_intfs_setup(struct mdss_mdp_ctl *ctl, 
			pinfo->bpp);

	itp.vsync_pulse_width = pinfo->lcdc.v_pulse_width;



	if (!ctl->panel_data->panel_info.cont_splash_enabled)

		if (mdss_mdp_video_timegen_setup(ctl, &itp)) {

			pr_err("unable to set timing parameters intfs: %d\n",

				(inum + MDSS_MDP_INTF0));