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Commit e84dc1cc authored by Tomi Valkeinen's avatar Tomi Valkeinen
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OMAPDSS: DSI: fix tlpx_half reg field length 



tlpx_half bit field in DSI_DSIPHY_CFG1 is [20,16], not [22,16] as
accessed in the code currently. Fix this.

The bug should not have caused any problems on OMAP3/4, as the bits
21,22 are unused. They are used on OMAP5, though.

Signed-off-by: default avatarTomi Valkeinen <tomi.valkeinen@ti.com>
parent d557a9cf

drivers/video/omap2/dss/dsi.c

+2 −2
Original line number Original line Diff line number Diff line
@@ -2289,7 +2289,7 @@ static void dsi_cio_timings(struct platform_device *dsidev) 
	dsi_write_reg(dsidev, DSI_DSIPHY_CFG0, r);

	dsi_write_reg(dsidev, DSI_DSIPHY_CFG0, r);





	r = dsi_read_reg(dsidev, DSI_DSIPHY_CFG1);

	r = dsi_read_reg(dsidev, DSI_DSIPHY_CFG1);

	r = FLD_MOD(r, tlpx_half, 22, 16);

	r = FLD_MOD(r, tlpx_half, 20, 16);

	r = FLD_MOD(r, tclk_trail, 15, 8);

	r = FLD_MOD(r, tclk_trail, 15, 8);

	r = FLD_MOD(r, tclk_zero, 7, 0);

	r = FLD_MOD(r, tclk_zero, 7, 0);
@@ -4107,7 +4107,7 @@ static void dsi_proto_timings(struct omap_dss_device *dssdev) 
	ths_exit = FLD_GET(r, 7, 0);

	ths_exit = FLD_GET(r, 7, 0);





	r = dsi_read_reg(dsidev, DSI_DSIPHY_CFG1);

	r = dsi_read_reg(dsidev, DSI_DSIPHY_CFG1);

	tlpx = FLD_GET(r, 22, 16) * 2;

	tlpx = FLD_GET(r, 20, 16) * 2;

	tclk_trail = FLD_GET(r, 15, 8);

	tclk_trail = FLD_GET(r, 15, 8);

	tclk_zero = FLD_GET(r, 7, 0);

	tclk_zero = FLD_GET(r, 7, 0);