Commit e83b06b0 authored Sep 17, 2014 by Saravana Kannan

PM / devfreq: Fix IRQ clearing in bimc-bwmon



The clearing of the BIMC BWMON IRQ needs clearing bits in two separate
registers. One is a global register and the other is a port specific
register.

The bit in the port specific register needs to be cleared first before
clearing the bit in the global register. Otherwise, the bit in the global
register gets set again before the port specific bit is cleared. Since
these register are in different address regions, we also need memory
barriers around writes to the global register.

Also, clear the counter value before clearing the interrupt status just to
be safe.

Change-Id: Iee8d2caf9bf7d639c65ed19c979036bd5e203bfd
Signed-off-by: Saravana Kannan <skannan@codeaurora.org>

parent 67616a64

drivers/devfreq/bimc-bwmon.c

+4 −2

Original line number	Diff line number	Diff line
		@@ -103,8 +103,10 @@ static int mon_irq_status(struct bwmon *m)

		static void mon_irq_clear(struct bwmon *m)
		{
		writel_relaxed(1 << m->mport, GLB_INT_CLR(m));
		writel_relaxed(0x1, MON_INT_CLR(m));
		mb();
		writel_relaxed(1 << m->mport, GLB_INT_CLR(m));
		mb();
		}

		static void mon_set_limit(struct bwmon *m, u32 count)
		@@ -225,8 +227,8 @@ static void stop_bw_hwmon(struct bw_hwmon *hw)
		free_irq(m->irq, m);
		mon_disable(m);
		mon_irq_disable(m);
		mon_irq_clear(m);
		mon_clear(m);
		mon_irq_clear(m);
		}

		static int suspend_bw_hwmon(struct bw_hwmon *hw)