Loading arch/microblaze/include/asm/exceptions.h +0 −6 Original line number Diff line number Diff line Loading @@ -64,12 +64,6 @@ asmlinkage void full_exception(struct pt_regs *regs, unsigned int type, void die(const char *str, struct pt_regs *fp, long err); void _exception(int signr, struct pt_regs *regs, int code, unsigned long addr); #ifdef CONFIG_MMU void __bug(const char *file, int line, void *data); int bad_trap(int trap_num, struct pt_regs *regs); int debug_trap(struct pt_regs *regs); #endif /* CONFIG_MMU */ #if defined(CONFIG_KGDB) void (*debugger)(struct pt_regs *regs); int (*debugger_bpt)(struct pt_regs *regs); Loading arch/microblaze/include/asm/io.h +0 −2 Original line number Diff line number Diff line Loading @@ -139,8 +139,6 @@ static inline void writel(unsigned int v, volatile void __iomem *addr) #ifdef CONFIG_MMU #define mm_ptov(addr) ((void *)__phys_to_virt(addr)) #define mm_vtop(addr) ((unsigned long)__virt_to_phys(addr)) #define phys_to_virt(addr) ((void *)__phys_to_virt(addr)) #define virt_to_phys(addr) ((unsigned long)__virt_to_phys(addr)) #define virt_to_bus(addr) ((unsigned long)__virt_to_phys(addr)) Loading arch/microblaze/include/asm/pgtable.h +0 −33 Original line number Diff line number Diff line Loading @@ -511,15 +511,6 @@ static inline pmd_t *pmd_offset(pgd_t *dir, unsigned long address) extern pgd_t swapper_pg_dir[PTRS_PER_PGD]; /* * When flushing the tlb entry for a page, we also need to flush the hash * table entry. flush_hash_page is assembler (for speed) in hashtable.S. */ extern int flush_hash_page(unsigned context, unsigned long va, pte_t *ptep); /* Add an HPTE to the hash table */ extern void add_hash_page(unsigned context, unsigned long va, pte_t *ptep); /* * Encode and decode a swap entry. * Note that the bits we use in a PTE for representing a swap entry Loading @@ -533,15 +524,7 @@ extern void add_hash_page(unsigned context, unsigned long va, pte_t *ptep); #define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) >> 2 }) #define __swp_entry_to_pte(x) ((pte_t) { (x).val << 2 }) /* CONFIG_APUS */ /* For virtual address to physical address conversion */ extern void cache_clear(__u32 addr, int length); extern void cache_push(__u32 addr, int length); extern int mm_end_of_chunk(unsigned long addr, int len); extern unsigned long iopa(unsigned long addr); /* extern unsigned long mm_ptov(unsigned long addr) \ __attribute__ ((const)); TBD */ /* Values for nocacheflag and cmode */ /* These are not used by the APUS kernel_map, but prevents Loading @@ -552,18 +535,6 @@ extern unsigned long iopa(unsigned long addr); #define IOMAP_NOCACHE_NONSER 2 #define IOMAP_NO_COPYBACK 3 /* * Map some physical address range into the kernel address space. */ extern unsigned long kernel_map(unsigned long paddr, unsigned long size, int nocacheflag, unsigned long *memavailp); /* * Set cache mode of (kernel space) address range. */ extern void kernel_set_cachemode(unsigned long address, unsigned long size, unsigned int cmode); /* Needs to be defined here and not in linux/mm.h, as it is arch dependent */ #define kern_addr_valid(addr) (1) Loading @@ -577,10 +548,6 @@ extern void kernel_set_cachemode(unsigned long address, unsigned long size, void do_page_fault(struct pt_regs *regs, unsigned long address, unsigned long error_code); void __init io_block_mapping(unsigned long virt, phys_addr_t phys, unsigned int size, int flags); void __init adjust_total_lowmem(void); void mapin_ram(void); int map_page(unsigned long va, phys_addr_t pa, int flags); Loading arch/microblaze/kernel/traps.c +0 −34 Original line number Diff line number Diff line Loading @@ -95,37 +95,3 @@ void dump_stack(void) show_stack(NULL, NULL); } EXPORT_SYMBOL(dump_stack); #ifdef CONFIG_MMU void __bug(const char *file, int line, void *data) { if (data) printk(KERN_CRIT "kernel BUG at %s:%d (data = %p)!\n", file, line, data); else printk(KERN_CRIT "kernel BUG at %s:%d!\n", file, line); machine_halt(); } int bad_trap(int trap_num, struct pt_regs *regs) { printk(KERN_CRIT "unimplemented trap %d called at 0x%08lx, pid %d!\n", trap_num, regs->pc, current->pid); return -ENOSYS; } int debug_trap(struct pt_regs *regs) { int i; printk(KERN_CRIT "debug trap\n"); for (i = 0; i < 32; i++) { /* printk("r%i:%08X\t",i,regs->gpr[i]); */ if ((i % 4) == 3) printk(KERN_CRIT "\n"); } printk(KERN_CRIT "pc:%08lX\tmsr:%08lX\n", regs->pc, regs->msr); return -ENOSYS; } #endif arch/microblaze/mm/pgtable.c +0 −36 Original line number Diff line number Diff line Loading @@ -161,24 +161,6 @@ int map_page(unsigned long va, phys_addr_t pa, int flags) return err; } void __init adjust_total_lowmem(void) { /* TBD */ #if 0 unsigned long max_low_mem = MAX_LOW_MEM; if (total_lowmem > max_low_mem) { total_lowmem = max_low_mem; #ifndef CONFIG_HIGHMEM printk(KERN_INFO "Warning, memory limited to %ld Mb, use " "CONFIG_HIGHMEM to reach %ld Mb\n", max_low_mem >> 20, total_memory >> 20); total_memory = total_lowmem; #endif /* CONFIG_HIGHMEM */ } #endif } /* * Map in all of physical memory starting at CONFIG_KERNEL_START. */ Loading Loading @@ -206,24 +188,6 @@ void __init mapin_ram(void) /* is x a power of 2? */ #define is_power_of_2(x) ((x) != 0 && (((x) & ((x) - 1)) == 0)) /* * Set up a mapping for a block of I/O. * virt, phys, size must all be page-aligned. * This should only be called before ioremap is called. */ void __init io_block_mapping(unsigned long virt, phys_addr_t phys, unsigned int size, int flags) { int i; if (virt > CONFIG_KERNEL_START && virt < ioremap_bot) ioremap_bot = ioremap_base = virt; /* Put it in the page tables. */ for (i = 0; i < size; i += PAGE_SIZE) map_page(virt + i, phys + i, flags); } /* Scan the real Linux page tables and return a PTE pointer for * a virtual address in a context. * Returns true (1) if PTE was found, zero otherwise. The pointer to Loading Loading
arch/microblaze/include/asm/exceptions.h +0 −6 Original line number Diff line number Diff line Loading @@ -64,12 +64,6 @@ asmlinkage void full_exception(struct pt_regs *regs, unsigned int type, void die(const char *str, struct pt_regs *fp, long err); void _exception(int signr, struct pt_regs *regs, int code, unsigned long addr); #ifdef CONFIG_MMU void __bug(const char *file, int line, void *data); int bad_trap(int trap_num, struct pt_regs *regs); int debug_trap(struct pt_regs *regs); #endif /* CONFIG_MMU */ #if defined(CONFIG_KGDB) void (*debugger)(struct pt_regs *regs); int (*debugger_bpt)(struct pt_regs *regs); Loading
arch/microblaze/include/asm/io.h +0 −2 Original line number Diff line number Diff line Loading @@ -139,8 +139,6 @@ static inline void writel(unsigned int v, volatile void __iomem *addr) #ifdef CONFIG_MMU #define mm_ptov(addr) ((void *)__phys_to_virt(addr)) #define mm_vtop(addr) ((unsigned long)__virt_to_phys(addr)) #define phys_to_virt(addr) ((void *)__phys_to_virt(addr)) #define virt_to_phys(addr) ((unsigned long)__virt_to_phys(addr)) #define virt_to_bus(addr) ((unsigned long)__virt_to_phys(addr)) Loading
arch/microblaze/include/asm/pgtable.h +0 −33 Original line number Diff line number Diff line Loading @@ -511,15 +511,6 @@ static inline pmd_t *pmd_offset(pgd_t *dir, unsigned long address) extern pgd_t swapper_pg_dir[PTRS_PER_PGD]; /* * When flushing the tlb entry for a page, we also need to flush the hash * table entry. flush_hash_page is assembler (for speed) in hashtable.S. */ extern int flush_hash_page(unsigned context, unsigned long va, pte_t *ptep); /* Add an HPTE to the hash table */ extern void add_hash_page(unsigned context, unsigned long va, pte_t *ptep); /* * Encode and decode a swap entry. * Note that the bits we use in a PTE for representing a swap entry Loading @@ -533,15 +524,7 @@ extern void add_hash_page(unsigned context, unsigned long va, pte_t *ptep); #define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) >> 2 }) #define __swp_entry_to_pte(x) ((pte_t) { (x).val << 2 }) /* CONFIG_APUS */ /* For virtual address to physical address conversion */ extern void cache_clear(__u32 addr, int length); extern void cache_push(__u32 addr, int length); extern int mm_end_of_chunk(unsigned long addr, int len); extern unsigned long iopa(unsigned long addr); /* extern unsigned long mm_ptov(unsigned long addr) \ __attribute__ ((const)); TBD */ /* Values for nocacheflag and cmode */ /* These are not used by the APUS kernel_map, but prevents Loading @@ -552,18 +535,6 @@ extern unsigned long iopa(unsigned long addr); #define IOMAP_NOCACHE_NONSER 2 #define IOMAP_NO_COPYBACK 3 /* * Map some physical address range into the kernel address space. */ extern unsigned long kernel_map(unsigned long paddr, unsigned long size, int nocacheflag, unsigned long *memavailp); /* * Set cache mode of (kernel space) address range. */ extern void kernel_set_cachemode(unsigned long address, unsigned long size, unsigned int cmode); /* Needs to be defined here and not in linux/mm.h, as it is arch dependent */ #define kern_addr_valid(addr) (1) Loading @@ -577,10 +548,6 @@ extern void kernel_set_cachemode(unsigned long address, unsigned long size, void do_page_fault(struct pt_regs *regs, unsigned long address, unsigned long error_code); void __init io_block_mapping(unsigned long virt, phys_addr_t phys, unsigned int size, int flags); void __init adjust_total_lowmem(void); void mapin_ram(void); int map_page(unsigned long va, phys_addr_t pa, int flags); Loading
arch/microblaze/kernel/traps.c +0 −34 Original line number Diff line number Diff line Loading @@ -95,37 +95,3 @@ void dump_stack(void) show_stack(NULL, NULL); } EXPORT_SYMBOL(dump_stack); #ifdef CONFIG_MMU void __bug(const char *file, int line, void *data) { if (data) printk(KERN_CRIT "kernel BUG at %s:%d (data = %p)!\n", file, line, data); else printk(KERN_CRIT "kernel BUG at %s:%d!\n", file, line); machine_halt(); } int bad_trap(int trap_num, struct pt_regs *regs) { printk(KERN_CRIT "unimplemented trap %d called at 0x%08lx, pid %d!\n", trap_num, regs->pc, current->pid); return -ENOSYS; } int debug_trap(struct pt_regs *regs) { int i; printk(KERN_CRIT "debug trap\n"); for (i = 0; i < 32; i++) { /* printk("r%i:%08X\t",i,regs->gpr[i]); */ if ((i % 4) == 3) printk(KERN_CRIT "\n"); } printk(KERN_CRIT "pc:%08lX\tmsr:%08lX\n", regs->pc, regs->msr); return -ENOSYS; } #endif
arch/microblaze/mm/pgtable.c +0 −36 Original line number Diff line number Diff line Loading @@ -161,24 +161,6 @@ int map_page(unsigned long va, phys_addr_t pa, int flags) return err; } void __init adjust_total_lowmem(void) { /* TBD */ #if 0 unsigned long max_low_mem = MAX_LOW_MEM; if (total_lowmem > max_low_mem) { total_lowmem = max_low_mem; #ifndef CONFIG_HIGHMEM printk(KERN_INFO "Warning, memory limited to %ld Mb, use " "CONFIG_HIGHMEM to reach %ld Mb\n", max_low_mem >> 20, total_memory >> 20); total_memory = total_lowmem; #endif /* CONFIG_HIGHMEM */ } #endif } /* * Map in all of physical memory starting at CONFIG_KERNEL_START. */ Loading Loading @@ -206,24 +188,6 @@ void __init mapin_ram(void) /* is x a power of 2? */ #define is_power_of_2(x) ((x) != 0 && (((x) & ((x) - 1)) == 0)) /* * Set up a mapping for a block of I/O. * virt, phys, size must all be page-aligned. * This should only be called before ioremap is called. */ void __init io_block_mapping(unsigned long virt, phys_addr_t phys, unsigned int size, int flags) { int i; if (virt > CONFIG_KERNEL_START && virt < ioremap_bot) ioremap_bot = ioremap_base = virt; /* Put it in the page tables. */ for (i = 0; i < size; i += PAGE_SIZE) map_page(virt + i, phys + i, flags); } /* Scan the real Linux page tables and return a PTE pointer for * a virtual address in a context. * Returns true (1) if PTE was found, zero otherwise. The pointer to Loading