Loading Documentation/devicetree/bindings/mmc/msm_sdcc.txtdeleted 100644 → 0 +0 −104 Original line number Diff line number Diff line Qualcomm Secure Digital Card Controller (SDCC) Secure Digital Card Controller provides host interface to SD/MMC/SDIO cards. Required properties: - compatible: should be "qcom,msm-sdcc" - reg: should contain SDCC (mandatory), SDCC-DML (optional) and BAM (optional) register maps. - reg-names: indicates various resources passed to driver (via reg property) by name. "reg-names" examples are "core_mem", "dml_mem" and "bam_mem". "dml_mem" and "bam_mem" are optional, and the SDCC driver will default to PIO mode when neither are present. - interrupts: should contain SDCC core interrupt. - interrupt-names: indicates interrupts passed to driver (via interrupts property) by name. "core_irq" is mandatory, "bam_irq" is mandatory only when BAM DMA engine is used. "status_irq" and "sdiowakeup_irq" are optional. - qcom,clk-rates: specifies supported SDCC clock frequencies, Units - Hz. - qcom,sup-voltages: specifies supported voltage ranges for card. Should always be specified in pairs (min, max), Units - mV. - <supply-name>-supply: phandle to the regulator device tree node. "supply-name" examples are "vdd", "vdd-io". Optional Properties: - cell-index: defines slot ID. - qcom,bus-width: defines the bus I/O width that controller supports. - wp-gpios: specify GPIO for write protect switch detection. - cd-gpios: specify GPIO for card detection. - qcom,nonremovable: specifies whether the card in slot is hot pluggable or hard wired. - qcom,disable-cmd23: disable sending CMD23 to card when controller can't support it. - qcom,bus-speed-mode: specifies supported bus speed modes by host. - qcom,current-limit: specifies max. current the host can drive. - qcom,xpc: specifies if the host can supply more than 150mA for SDXC cards. - qcom,dat1-mpm-int: specifies MPM interrupt number corresponding to DAT1 line of SDCC (used only if slot has dedicated DAT1 MSM pin (not GPIO)) In the following, <supply> can be vdd (flash core voltage) or vdd-io (I/O voltage). - qcom,<supply>-always-on: specifies whether supply should be kept "on" always. - qcom,<supply>-lpm-sup: specifies whether supply can be kept in low power mode (lpm). - qcom,<supply>-voltage-level: specifies voltage levels for supply. Should be specified in pairs (min, max), units uV. - qcom,<supply>-current-level: specifies load levels for supply in lpm or high power mode (hpm). Should be specified in pairs (lpm, hpm), units uA. - gpios: specifies gpios assigned for sdcc slot. - qcom,gpio-names: a list of strings that map in order to the list of gpios. A slot has either gpios or dedicated tlmm pins as represented below. - qcom,pad-pull-on: Active pull configuration for sdc tlmm pins - qcom,pad-pull-off: Suspend pull configuration for sdc tlmm pins. - qcom,pad-drv-on: Active drive strength configuration for sdc tlmm pins. - qcom,pad-drv-off: Suspend drive strength configuration for sdc tlmm pins. Tlmm pins are specified as <clk cmd data> - qcom,bus-bw-vectors-bps: specifies array of throughput values in Bytes/sec. The values in the array are determined according to supported bus speed modes. For example, if host supports SDR12 mode, value is 13631488 Bytes/sec. - Refer to "Documentation/devicetree/bindings/arm/msm/msm_bus.txt" for below optional properties: - qcom,msm-bus,name - qcom,msm-bus,num-cases - qcom,msm-bus,active-only - qcom,msm-bus,num-paths - qcom,msm-bus,vectors-KBps Example: qcom,sdcc@f9600000 { /* SDC1 used as eMMC slot */ cell-index = <1>; compatible = "qcom,msm-sdcc"; reg = <0xf9600000 0x800 // SDCC register interface /* To use PIO instead of BAM, skip DML and BAM regs */ 0xf9600800 0x1800 // DML register interface 0xf9602000 0x2000> // BAM register interface interrupts = <123>; qcom,clk-rates = <400000 24000000 48000000>; qcom,sup-voltages = <2700 3300>; qcom,bus-width = <8>; //8-bit wide qcom,nonremovable; qcom,msm-bus,name = "sdcc2"; qcom,msm-bus,num-cases = <7>; qcom,msm-bus,num-paths = <1>; qcom,msm-bus,vectors-KBps = <81 512 0 0>, /* No vote */ <81 512 6656 13312>, /* 13 MB/s*/ <81 512 13312 26624>, /* 26 MB/s */ <81 512 26624 53248>, /* 52 MB/s */ <81 512 53248 106496>, /* 104 MB/s */ <81 512 106496 212992>, /* 208 MB/s */ <81 512 2147483647 4294967295>; /* Max. bandwidth */ qcom,bus-bw-vectors-bps = <0 13631488 27262976 54525952 109051904 218103808 4294967295>; }; arch/arm/boot/dts/qcom/apq8074-dragonboard.dtsi +0 −5 Original line number Diff line number Diff line Loading @@ -248,11 +248,6 @@ qcom,memory-reservation-size = <0x1000000>; /* size 16MB */ }; &sdcc3 { qcom,sup-voltages = <2000 2000>; status = "ok"; }; &pm8941_l19 { regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; Loading arch/arm/boot/dts/qcom/apq8074-v2.0-1.dtsi +0 −5 Original line number Diff line number Diff line Loading @@ -71,11 +71,6 @@ status = "disabled"; }; &sdcc3 { qcom,sup-voltages = <2000 2000>; status = "ok"; }; &ehci { hsusb_vdd_dig-supply = <&pm8841_s2_corner>; qcom,vdd-voltage-level = <1 2 3 5 7>; Loading arch/arm/boot/dts/qcom/apq8074-v2.2.dtsi +0 −6 Original line number Diff line number Diff line Loading @@ -74,9 +74,3 @@ &qseecom { status = "disabled"; }; &sdcc3 { qcom,sup-voltages = <2000 2000>; status = "ok"; }; arch/arm/boot/dts/qcom/apq8084.dtsi +0 −53 Original line number Diff line number Diff line Loading @@ -413,31 +413,6 @@ reg-names = "rfsa_mdm"; }; sdcc1: qcom,sdcc@f9824000 { cell-index = <1>; /* SDC1 eMMC slot */ compatible = "qcom,msm-sdcc"; reg = <0xf9824000 0x800>; reg-names = "core_mem"; interrupts = <0 123 0>; interrupt-names = "core_irq"; qcom,bus-width = <8>; qcom,msm-bus,name = "sdcc1"; qcom,msm-bus,num-cases = <8>; qcom,msm-bus,num-paths = <1>; qcom,msm-bus,vectors-KBps = <78 512 0 0>, /* No vote */ <78 512 1600 3200>, /* 400 KB/s*/ <78 512 80000 160000>, /* 20 MB/s */ <78 512 100000 200000>, /* 25 MB/s */ <78 512 200000 400000>, /* 50 MB/s */ <78 512 400000 800000>, /* 100 MB/s */ <78 512 400000 800000>, /* 200 MB/s */ <78 512 2048000 4096000>; /* Max. bandwidth */ qcom,bus-bw-vectors-bps = <0 400000 20000000 25000000 50000000 100000000 200000000 4294967295>; status = "disabled"; }; sdhc_1: sdhci@f9824900 { compatible = "qcom,sdhci-msm"; reg = <0xf9824900 0x1a0>, <0xf9824000 0x800>; Loading Loading @@ -468,34 +443,6 @@ status = "disabled"; }; sdcc2: qcom,sdcc@f98a4000 { cell-index = <2>; /* SDC2 SD card slot */ compatible = "qcom,msm-sdcc"; reg = <0xf98a4000 0x800>; reg-names = "core_mem"; interrupts = <0 125 0>; interrupt-names = "core_irq"; qcom,bus-width = <4>; qcom,cpu-dma-latency-us = <200>; qcom,msm-bus,name = "sdcc2"; qcom,msm-bus,num-cases = <8>; qcom,msm-bus,num-paths = <1>; qcom,msm-bus,vectors-KBps = <81 512 0 0>, /* No vote */ <81 512 1600 3200>, /* 400 KB/s*/ <81 512 80000 160000>, /* 20 MB/s */ <81 512 100000 200000>, /* 25 MB/s */ <81 512 200000 400000>, /* 50 MB/s */ <81 512 400000 800000>, /* 100 MB/s */ <81 512 800000 800000>, /* 200 MB/s */ <81 512 2048000 4096000>; /* Max. bandwidth */ qcom,bus-bw-vectors-bps = <0 400000 20000000 25000000 50000000 100000000 200000000 4294967295>; status = "disabled"; }; sdhc_2: sdhci@f98a4900 { compatible = "qcom,sdhci-msm"; reg = <0xf98a4900 0x11c>, <0xf98a4000 0x800>; Loading Loading
Documentation/devicetree/bindings/mmc/msm_sdcc.txtdeleted 100644 → 0 +0 −104 Original line number Diff line number Diff line Qualcomm Secure Digital Card Controller (SDCC) Secure Digital Card Controller provides host interface to SD/MMC/SDIO cards. Required properties: - compatible: should be "qcom,msm-sdcc" - reg: should contain SDCC (mandatory), SDCC-DML (optional) and BAM (optional) register maps. - reg-names: indicates various resources passed to driver (via reg property) by name. "reg-names" examples are "core_mem", "dml_mem" and "bam_mem". "dml_mem" and "bam_mem" are optional, and the SDCC driver will default to PIO mode when neither are present. - interrupts: should contain SDCC core interrupt. - interrupt-names: indicates interrupts passed to driver (via interrupts property) by name. "core_irq" is mandatory, "bam_irq" is mandatory only when BAM DMA engine is used. "status_irq" and "sdiowakeup_irq" are optional. - qcom,clk-rates: specifies supported SDCC clock frequencies, Units - Hz. - qcom,sup-voltages: specifies supported voltage ranges for card. Should always be specified in pairs (min, max), Units - mV. - <supply-name>-supply: phandle to the regulator device tree node. "supply-name" examples are "vdd", "vdd-io". Optional Properties: - cell-index: defines slot ID. - qcom,bus-width: defines the bus I/O width that controller supports. - wp-gpios: specify GPIO for write protect switch detection. - cd-gpios: specify GPIO for card detection. - qcom,nonremovable: specifies whether the card in slot is hot pluggable or hard wired. - qcom,disable-cmd23: disable sending CMD23 to card when controller can't support it. - qcom,bus-speed-mode: specifies supported bus speed modes by host. - qcom,current-limit: specifies max. current the host can drive. - qcom,xpc: specifies if the host can supply more than 150mA for SDXC cards. - qcom,dat1-mpm-int: specifies MPM interrupt number corresponding to DAT1 line of SDCC (used only if slot has dedicated DAT1 MSM pin (not GPIO)) In the following, <supply> can be vdd (flash core voltage) or vdd-io (I/O voltage). - qcom,<supply>-always-on: specifies whether supply should be kept "on" always. - qcom,<supply>-lpm-sup: specifies whether supply can be kept in low power mode (lpm). - qcom,<supply>-voltage-level: specifies voltage levels for supply. Should be specified in pairs (min, max), units uV. - qcom,<supply>-current-level: specifies load levels for supply in lpm or high power mode (hpm). Should be specified in pairs (lpm, hpm), units uA. - gpios: specifies gpios assigned for sdcc slot. - qcom,gpio-names: a list of strings that map in order to the list of gpios. A slot has either gpios or dedicated tlmm pins as represented below. - qcom,pad-pull-on: Active pull configuration for sdc tlmm pins - qcom,pad-pull-off: Suspend pull configuration for sdc tlmm pins. - qcom,pad-drv-on: Active drive strength configuration for sdc tlmm pins. - qcom,pad-drv-off: Suspend drive strength configuration for sdc tlmm pins. Tlmm pins are specified as <clk cmd data> - qcom,bus-bw-vectors-bps: specifies array of throughput values in Bytes/sec. The values in the array are determined according to supported bus speed modes. For example, if host supports SDR12 mode, value is 13631488 Bytes/sec. - Refer to "Documentation/devicetree/bindings/arm/msm/msm_bus.txt" for below optional properties: - qcom,msm-bus,name - qcom,msm-bus,num-cases - qcom,msm-bus,active-only - qcom,msm-bus,num-paths - qcom,msm-bus,vectors-KBps Example: qcom,sdcc@f9600000 { /* SDC1 used as eMMC slot */ cell-index = <1>; compatible = "qcom,msm-sdcc"; reg = <0xf9600000 0x800 // SDCC register interface /* To use PIO instead of BAM, skip DML and BAM regs */ 0xf9600800 0x1800 // DML register interface 0xf9602000 0x2000> // BAM register interface interrupts = <123>; qcom,clk-rates = <400000 24000000 48000000>; qcom,sup-voltages = <2700 3300>; qcom,bus-width = <8>; //8-bit wide qcom,nonremovable; qcom,msm-bus,name = "sdcc2"; qcom,msm-bus,num-cases = <7>; qcom,msm-bus,num-paths = <1>; qcom,msm-bus,vectors-KBps = <81 512 0 0>, /* No vote */ <81 512 6656 13312>, /* 13 MB/s*/ <81 512 13312 26624>, /* 26 MB/s */ <81 512 26624 53248>, /* 52 MB/s */ <81 512 53248 106496>, /* 104 MB/s */ <81 512 106496 212992>, /* 208 MB/s */ <81 512 2147483647 4294967295>; /* Max. bandwidth */ qcom,bus-bw-vectors-bps = <0 13631488 27262976 54525952 109051904 218103808 4294967295>; };
arch/arm/boot/dts/qcom/apq8074-dragonboard.dtsi +0 −5 Original line number Diff line number Diff line Loading @@ -248,11 +248,6 @@ qcom,memory-reservation-size = <0x1000000>; /* size 16MB */ }; &sdcc3 { qcom,sup-voltages = <2000 2000>; status = "ok"; }; &pm8941_l19 { regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; Loading
arch/arm/boot/dts/qcom/apq8074-v2.0-1.dtsi +0 −5 Original line number Diff line number Diff line Loading @@ -71,11 +71,6 @@ status = "disabled"; }; &sdcc3 { qcom,sup-voltages = <2000 2000>; status = "ok"; }; &ehci { hsusb_vdd_dig-supply = <&pm8841_s2_corner>; qcom,vdd-voltage-level = <1 2 3 5 7>; Loading
arch/arm/boot/dts/qcom/apq8074-v2.2.dtsi +0 −6 Original line number Diff line number Diff line Loading @@ -74,9 +74,3 @@ &qseecom { status = "disabled"; }; &sdcc3 { qcom,sup-voltages = <2000 2000>; status = "ok"; };
arch/arm/boot/dts/qcom/apq8084.dtsi +0 −53 Original line number Diff line number Diff line Loading @@ -413,31 +413,6 @@ reg-names = "rfsa_mdm"; }; sdcc1: qcom,sdcc@f9824000 { cell-index = <1>; /* SDC1 eMMC slot */ compatible = "qcom,msm-sdcc"; reg = <0xf9824000 0x800>; reg-names = "core_mem"; interrupts = <0 123 0>; interrupt-names = "core_irq"; qcom,bus-width = <8>; qcom,msm-bus,name = "sdcc1"; qcom,msm-bus,num-cases = <8>; qcom,msm-bus,num-paths = <1>; qcom,msm-bus,vectors-KBps = <78 512 0 0>, /* No vote */ <78 512 1600 3200>, /* 400 KB/s*/ <78 512 80000 160000>, /* 20 MB/s */ <78 512 100000 200000>, /* 25 MB/s */ <78 512 200000 400000>, /* 50 MB/s */ <78 512 400000 800000>, /* 100 MB/s */ <78 512 400000 800000>, /* 200 MB/s */ <78 512 2048000 4096000>; /* Max. bandwidth */ qcom,bus-bw-vectors-bps = <0 400000 20000000 25000000 50000000 100000000 200000000 4294967295>; status = "disabled"; }; sdhc_1: sdhci@f9824900 { compatible = "qcom,sdhci-msm"; reg = <0xf9824900 0x1a0>, <0xf9824000 0x800>; Loading Loading @@ -468,34 +443,6 @@ status = "disabled"; }; sdcc2: qcom,sdcc@f98a4000 { cell-index = <2>; /* SDC2 SD card slot */ compatible = "qcom,msm-sdcc"; reg = <0xf98a4000 0x800>; reg-names = "core_mem"; interrupts = <0 125 0>; interrupt-names = "core_irq"; qcom,bus-width = <4>; qcom,cpu-dma-latency-us = <200>; qcom,msm-bus,name = "sdcc2"; qcom,msm-bus,num-cases = <8>; qcom,msm-bus,num-paths = <1>; qcom,msm-bus,vectors-KBps = <81 512 0 0>, /* No vote */ <81 512 1600 3200>, /* 400 KB/s*/ <81 512 80000 160000>, /* 20 MB/s */ <81 512 100000 200000>, /* 25 MB/s */ <81 512 200000 400000>, /* 50 MB/s */ <81 512 400000 800000>, /* 100 MB/s */ <81 512 800000 800000>, /* 200 MB/s */ <81 512 2048000 4096000>; /* Max. bandwidth */ qcom,bus-bw-vectors-bps = <0 400000 20000000 25000000 50000000 100000000 200000000 4294967295>; status = "disabled"; }; sdhc_2: sdhci@f98a4900 { compatible = "qcom,sdhci-msm"; reg = <0xf98a4900 0x11c>, <0xf98a4000 0x800>; Loading