Loading arch/arm/mach-msm/clock-8974.c +41 −11 Original line number Diff line number Diff line Loading @@ -5130,16 +5130,19 @@ static struct clk_lookup msm_clocks_8974_common[] __initdata = { CLK_LOOKUP("ispif_ahb_clk", camss_ispif_ahb_clk.c, "fda0a000.qcom,ispif"), CLK_LOOKUP("vfe0_clk_src", vfe0_clk_src.c, "fda0a000.qcom,ispif"), CLK_LOOKUP("vfe0_clk_src", vfe0_clk_src.c, "fda0a000.qcom,ispif"), CLK_LOOKUP("camss_vfe_vfe0_clk", camss_vfe_vfe0_clk.c, "fda0a000.qcom,ispif"), CLK_LOOKUP("camss_csi_vfe0_clk", camss_csi_vfe0_clk.c, "fda0a000.qcom,ispif"), CLK_LOOKUP("vfe1_clk_src", vfe1_clk_src.c, "fda0a000.qcom,ispif"), CLK_LOOKUP("vfe1_clk_src", vfe1_clk_src.c, "fda0a000.qcom,ispif"), CLK_LOOKUP("camss_vfe_vfe1_clk", camss_vfe_vfe1_clk.c, "fda0a000.qcom,ispif"), CLK_LOOKUP("camss_csi_vfe1_clk", camss_csi_vfe1_clk.c, "fda0a000.qcom,ispif"), CLK_LOOKUP("csi0_src_clk", csi0_clk_src.c, "fda0a000.qcom,ispif"), CLK_LOOKUP("csi0_clk", camss_csi0_clk.c, Loading @@ -5149,6 +5152,33 @@ static struct clk_lookup msm_clocks_8974_common[] __initdata = { CLK_LOOKUP("csi0_rdi_clk", camss_csi0rdi_clk.c, "fda0a000.qcom,ispif"), CLK_LOOKUP("csi1_src_clk", csi1_clk_src.c, "fda0a000.qcom,ispif"), CLK_LOOKUP("csi1_clk", camss_csi1_clk.c, "fda0a000.qcom,ispif"), CLK_LOOKUP("csi1_pix_clk", camss_csi1pix_clk.c, "fda0a000.qcom,ispif"), CLK_LOOKUP("csi1_rdi_clk", camss_csi1rdi_clk.c, "fda0a000.qcom,ispif"), CLK_LOOKUP("csi2_src_clk", csi2_clk_src.c, "fda0a000.qcom,ispif"), CLK_LOOKUP("csi2_clk", camss_csi2_clk.c, "fda0a000.qcom,ispif"), CLK_LOOKUP("csi2_pix_clk", camss_csi2pix_clk.c, "fda0a000.qcom,ispif"), CLK_LOOKUP("csi2_rdi_clk", camss_csi2rdi_clk.c, "fda0a000.qcom,ispif"), CLK_LOOKUP("csi3_src_clk", csi3_clk_src.c, "fda0a000.qcom,ispif"), CLK_LOOKUP("csi3_clk", camss_csi3_clk.c, "fda0a000.qcom,ispif"), CLK_LOOKUP("csi3_pix_clk", camss_csi3pix_clk.c, "fda0a000.qcom,ispif"), CLK_LOOKUP("csi3_rdi_clk", camss_csi3rdi_clk.c, "fda0a000.qcom,ispif"), /*VFE clocks*/ CLK_LOOKUP("camss_top_ahb_clk", camss_top_ahb_clk.c, "fda10000.qcom,vfe"), Loading drivers/media/platform/msm/camera_v2/ispif/msm_ispif.c +18 −0 Original line number Diff line number Diff line Loading @@ -72,6 +72,18 @@ static struct msm_cam_clk_info ispif_8974_reset_clk_info[] = { {"csi0_clk", NO_SET_RATE}, {"csi0_pix_clk", NO_SET_RATE}, {"csi0_rdi_clk", NO_SET_RATE}, {"csi1_src_clk", INIT_RATE}, {"csi1_clk", NO_SET_RATE}, {"csi1_pix_clk", NO_SET_RATE}, {"csi1_rdi_clk", NO_SET_RATE}, {"csi2_src_clk", INIT_RATE}, {"csi2_clk", NO_SET_RATE}, {"csi2_pix_clk", NO_SET_RATE}, {"csi2_rdi_clk", NO_SET_RATE}, {"csi3_src_clk", INIT_RATE}, {"csi3_clk", NO_SET_RATE}, {"csi3_pix_clk", NO_SET_RATE}, {"csi3_rdi_clk", NO_SET_RATE}, {"vfe0_clk_src", INIT_RATE}, {"camss_vfe_vfe0_clk", NO_SET_RATE}, {"camss_csi_vfe0_clk", NO_SET_RATE}, Loading Loading @@ -110,6 +122,9 @@ static int msm_ispif_reset_hw(struct ispif_device *ispif) CDBG("%s: VFE0 done\n", __func__); if (timeout <= 0) { pr_err("%s: VFE0 reset wait timeout\n", __func__); msm_cam_clk_enable(&ispif->pdev->dev, ispif_8974_reset_clk_info, reset_clk, ARRAY_SIZE(ispif_8974_reset_clk_info), 0); return -ETIMEDOUT; } Loading @@ -120,6 +135,9 @@ static int msm_ispif_reset_hw(struct ispif_device *ispif) CDBG("%s: VFE1 done\n", __func__); if (timeout <= 0) { pr_err("%s: VFE1 reset wait timeout\n", __func__); msm_cam_clk_enable(&ispif->pdev->dev, ispif_8974_reset_clk_info, reset_clk, ARRAY_SIZE(ispif_8974_reset_clk_info), 0); return -ETIMEDOUT; } } Loading Loading
arch/arm/mach-msm/clock-8974.c +41 −11 Original line number Diff line number Diff line Loading @@ -5130,16 +5130,19 @@ static struct clk_lookup msm_clocks_8974_common[] __initdata = { CLK_LOOKUP("ispif_ahb_clk", camss_ispif_ahb_clk.c, "fda0a000.qcom,ispif"), CLK_LOOKUP("vfe0_clk_src", vfe0_clk_src.c, "fda0a000.qcom,ispif"), CLK_LOOKUP("vfe0_clk_src", vfe0_clk_src.c, "fda0a000.qcom,ispif"), CLK_LOOKUP("camss_vfe_vfe0_clk", camss_vfe_vfe0_clk.c, "fda0a000.qcom,ispif"), CLK_LOOKUP("camss_csi_vfe0_clk", camss_csi_vfe0_clk.c, "fda0a000.qcom,ispif"), CLK_LOOKUP("vfe1_clk_src", vfe1_clk_src.c, "fda0a000.qcom,ispif"), CLK_LOOKUP("vfe1_clk_src", vfe1_clk_src.c, "fda0a000.qcom,ispif"), CLK_LOOKUP("camss_vfe_vfe1_clk", camss_vfe_vfe1_clk.c, "fda0a000.qcom,ispif"), CLK_LOOKUP("camss_csi_vfe1_clk", camss_csi_vfe1_clk.c, "fda0a000.qcom,ispif"), CLK_LOOKUP("csi0_src_clk", csi0_clk_src.c, "fda0a000.qcom,ispif"), CLK_LOOKUP("csi0_clk", camss_csi0_clk.c, Loading @@ -5149,6 +5152,33 @@ static struct clk_lookup msm_clocks_8974_common[] __initdata = { CLK_LOOKUP("csi0_rdi_clk", camss_csi0rdi_clk.c, "fda0a000.qcom,ispif"), CLK_LOOKUP("csi1_src_clk", csi1_clk_src.c, "fda0a000.qcom,ispif"), CLK_LOOKUP("csi1_clk", camss_csi1_clk.c, "fda0a000.qcom,ispif"), CLK_LOOKUP("csi1_pix_clk", camss_csi1pix_clk.c, "fda0a000.qcom,ispif"), CLK_LOOKUP("csi1_rdi_clk", camss_csi1rdi_clk.c, "fda0a000.qcom,ispif"), CLK_LOOKUP("csi2_src_clk", csi2_clk_src.c, "fda0a000.qcom,ispif"), CLK_LOOKUP("csi2_clk", camss_csi2_clk.c, "fda0a000.qcom,ispif"), CLK_LOOKUP("csi2_pix_clk", camss_csi2pix_clk.c, "fda0a000.qcom,ispif"), CLK_LOOKUP("csi2_rdi_clk", camss_csi2rdi_clk.c, "fda0a000.qcom,ispif"), CLK_LOOKUP("csi3_src_clk", csi3_clk_src.c, "fda0a000.qcom,ispif"), CLK_LOOKUP("csi3_clk", camss_csi3_clk.c, "fda0a000.qcom,ispif"), CLK_LOOKUP("csi3_pix_clk", camss_csi3pix_clk.c, "fda0a000.qcom,ispif"), CLK_LOOKUP("csi3_rdi_clk", camss_csi3rdi_clk.c, "fda0a000.qcom,ispif"), /*VFE clocks*/ CLK_LOOKUP("camss_top_ahb_clk", camss_top_ahb_clk.c, "fda10000.qcom,vfe"), Loading
drivers/media/platform/msm/camera_v2/ispif/msm_ispif.c +18 −0 Original line number Diff line number Diff line Loading @@ -72,6 +72,18 @@ static struct msm_cam_clk_info ispif_8974_reset_clk_info[] = { {"csi0_clk", NO_SET_RATE}, {"csi0_pix_clk", NO_SET_RATE}, {"csi0_rdi_clk", NO_SET_RATE}, {"csi1_src_clk", INIT_RATE}, {"csi1_clk", NO_SET_RATE}, {"csi1_pix_clk", NO_SET_RATE}, {"csi1_rdi_clk", NO_SET_RATE}, {"csi2_src_clk", INIT_RATE}, {"csi2_clk", NO_SET_RATE}, {"csi2_pix_clk", NO_SET_RATE}, {"csi2_rdi_clk", NO_SET_RATE}, {"csi3_src_clk", INIT_RATE}, {"csi3_clk", NO_SET_RATE}, {"csi3_pix_clk", NO_SET_RATE}, {"csi3_rdi_clk", NO_SET_RATE}, {"vfe0_clk_src", INIT_RATE}, {"camss_vfe_vfe0_clk", NO_SET_RATE}, {"camss_csi_vfe0_clk", NO_SET_RATE}, Loading Loading @@ -110,6 +122,9 @@ static int msm_ispif_reset_hw(struct ispif_device *ispif) CDBG("%s: VFE0 done\n", __func__); if (timeout <= 0) { pr_err("%s: VFE0 reset wait timeout\n", __func__); msm_cam_clk_enable(&ispif->pdev->dev, ispif_8974_reset_clk_info, reset_clk, ARRAY_SIZE(ispif_8974_reset_clk_info), 0); return -ETIMEDOUT; } Loading @@ -120,6 +135,9 @@ static int msm_ispif_reset_hw(struct ispif_device *ispif) CDBG("%s: VFE1 done\n", __func__); if (timeout <= 0) { pr_err("%s: VFE1 reset wait timeout\n", __func__); msm_cam_clk_enable(&ispif->pdev->dev, ispif_8974_reset_clk_info, reset_clk, ARRAY_SIZE(ispif_8974_reset_clk_info), 0); return -ETIMEDOUT; } } Loading