Loading arch/arm/boot/dts/apq8084.dtsi +32 −0 Original line number Diff line number Diff line Loading @@ -447,6 +447,38 @@ #interrupt-cells = <3>; }; qcom,qcedev@fd440000 { compatible = "qcom,qcedev"; reg = <0xfd440000 0x20000>, <0xfd444000 0x8000>; reg-names = "crypto-base","crypto-bam-base"; interrupts = <0 236 0>; qcom,bam-pipe-pair = <1>; qcom,ce-hw-instance = <1>; qcom,msm-bus,name = "qcedev-noc"; qcom,msm-bus,num-cases = <2>; qcom,msm-bus,num-paths = <1>; qcom,msm-bus,vectors-KBps = <56 512 0 0>, <56 512 3936000 393600>; }; qcom,qcrypto@fd444000 { compatible = "qcom,qcrypto"; reg = <0xfd440000 0x20000>, <0xfd444000 0x8000>; reg-names = "crypto-base","crypto-bam-base"; interrupts = <0 236 0>; qcom,bam-pipe-pair = <2>; qcom,ce-hw-instance = <1>; qcom,msm-bus,name = "qcrypto-noc"; qcom,msm-bus,num-cases = <2>; qcom,msm-bus,num-paths = <1>; qcom,msm-bus,vectors-KBps = <56 512 0 0>, <56 512 3936000 393600>; }; wcd9xxx_intc: wcd9xxx-irq { compatible = "qcom,wcd9xxx-irq"; interrupt-controller; Loading Loading
arch/arm/boot/dts/apq8084.dtsi +32 −0 Original line number Diff line number Diff line Loading @@ -447,6 +447,38 @@ #interrupt-cells = <3>; }; qcom,qcedev@fd440000 { compatible = "qcom,qcedev"; reg = <0xfd440000 0x20000>, <0xfd444000 0x8000>; reg-names = "crypto-base","crypto-bam-base"; interrupts = <0 236 0>; qcom,bam-pipe-pair = <1>; qcom,ce-hw-instance = <1>; qcom,msm-bus,name = "qcedev-noc"; qcom,msm-bus,num-cases = <2>; qcom,msm-bus,num-paths = <1>; qcom,msm-bus,vectors-KBps = <56 512 0 0>, <56 512 3936000 393600>; }; qcom,qcrypto@fd444000 { compatible = "qcom,qcrypto"; reg = <0xfd440000 0x20000>, <0xfd444000 0x8000>; reg-names = "crypto-base","crypto-bam-base"; interrupts = <0 236 0>; qcom,bam-pipe-pair = <2>; qcom,ce-hw-instance = <1>; qcom,msm-bus,name = "qcrypto-noc"; qcom,msm-bus,num-cases = <2>; qcom,msm-bus,num-paths = <1>; qcom,msm-bus,vectors-KBps = <56 512 0 0>, <56 512 3936000 393600>; }; wcd9xxx_intc: wcd9xxx-irq { compatible = "qcom,wcd9xxx-irq"; interrupt-controller; Loading