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Commit e1e650ac authored by Hardik Kantilal Patel's avatar Hardik Kantilal Patel
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ARM: dts: msm: Add xo and rf_clk clock entry for wcnss 



xo clock required to supply 48 Mhz clock for IRIS crystal
oscillator. rf_clk clock required to make Pronto sub system
out of reset in 19.2 Mhz clock mode. This change is to add both
clock entry under wcnss node.

Change-Id: Ia5079db9fbcc165a2a8b1b9e5aec70d8bd69aadc
CRs-fixed: 567674
Signed-off-by: default avatarHardik Kantilal Patel <hkpatel@codeaurora.org>
parent e3dba048

Documentation/devicetree/bindings/wcnss/wcnss-wlan.txt

+6 −0
Original line number Diff line number Diff line
@@ -28,6 +28,8 @@ Required properties: 
- qcom,wcnss-adc_tm: ADC handle for vbatt notification APIs.

- pinctrl-<n> : Pinctrl states as described in bindings/pinctrl/pinctrl-bindings.txt

- pinctrl-names : Names corresponding to the numbered pinctrl states

- clocks: from common clock binding: handle to xo and rf_clk clocks.

- clock-names: Names of all the clocks that are accessed by the subsystem



Optional properties:

- qcom,has-autodetect-xo: boolean flag to determine whether Iris XO auto detect
@@ -66,4 +68,8 @@ Example: 
        pinctrl-names = "wcnss_default", "wcnss_sleep";

        pinctrl-0 = <&wcnss_default>;

        pinctrl-1 = <&wcnss_sleep>;



        clocks = <&clock_rpm clk_xo_wlan_clk>,

                   <&clock_rpm clk_rf_clk2>;

        clock-names = "xo", "rf_clk";

    };

arch/arm/boot/dts/qcom/msm8916.dtsi

+4 −0
Original line number Diff line number Diff line
@@ -1154,6 +1154,10 @@ 
		pinctrl-0 = <&wcnss_default>;

		pinctrl-1 = <&wcnss_sleep>;



		clocks = <&clock_rpm clk_xo_wlan_clk>,

			 <&clock_rpm clk_rf_clk2>;

		clock-names = "xo", "rf_clk";



		qcom,has-autodetect-xo;

		qcom,is-pronto-vt;

		qcom,has-pronto-hw;