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Commit e1847f46 authored Dec 02, 2014 by Konstantin Dorfman

ARM: dts: msm: fix sdhc1 slot support to msm8992



This change fixes "ARM: dts: msm: add sdhc1 and sdhc2 slot support to
msm8992" c610b128 change. The change
completes sdhc1 device tree node definition with following: reference
clock definition, clock rate table and bus speed modes in order to enable
eMMC HS400 mode to msm8992 CDP and MTP.

Change-Id: Iee2880e3dc7ce44a053f78d8d2ef392cb5df0a92
Signed-off-by: Konstantin Dorfman <kdorfman@codeaurora.org>

parent dca34e2b

arch/arm/boot/dts/qcom/msm8992-cdp.dtsi

+4 −3

Original line number	Diff line number	Diff line
		@@ -45,10 +45,11 @@
		qcom,vdd-io-current-level = <200 325000>;

		pinctrl-names = "active", "sleep";
		pinctrl-0 = <&sdc1_clk_on &sdc1_cmd_on &sdc1_data_on>;
		pinctrl-1 = <&sdc1_clk_off &sdc1_cmd_off &sdc1_data_off>;
		pinctrl-0 = <&sdc1_clk_on &sdc1_cmd_on &sdc1_data_on &sdc1_rclk_on>;
		pinctrl-1 = <&sdc1_clk_off &sdc1_cmd_off &sdc1_data_off &sdc1_rclk_off>;

		qcom,clk-rates = <400000 20000000 25000000 50000000>;
		qcom,clk-rates = <400000 20000000 25000000 50000000 100000000 192000000 384000000>;
		qcom,bus-speed-mode = "HS400_1p8v", "HS200_1p8v", "DDR_1p8v";
		qcom,nonremovable;
		status = "ok";
		};

arch/arm/boot/dts/qcom/msm8992-mtp.dtsi

+4 −3

Original line number	Diff line number	Diff line
		@@ -54,11 +54,12 @@
		qcom,vdd-io-current-level = <200 325000>;

		pinctrl-names = "active", "sleep";
		pinctrl-0 = <&sdc1_clk_on &sdc1_cmd_on &sdc1_data_on>;
		pinctrl-1 = <&sdc1_clk_off &sdc1_cmd_off &sdc1_data_off>;
		pinctrl-0 = <&sdc1_clk_on &sdc1_cmd_on &sdc1_data_on &sdc1_rclk_on>;
		pinctrl-1 = <&sdc1_clk_off &sdc1_cmd_off &sdc1_data_off &sdc1_rclk_off>;

		qcom,clk-rates = <400000 20000000 25000000 50000000>;
		qcom,nonremovable;
		qcom,clk-rates = <400000 20000000 25000000 50000000 100000000 192000000 384000000>;
		qcom,bus-speed-mode = "HS400_1p8v", "HS200_1p8v", "DDR_1p8v";
		status = "ok";
		};