Merge "ARM: dts: msm: Add a PCIe device for APQ8084"

		qcom,pipe-attr-ee;

	};

	pcie0: qcom,pcie@fc520000 {

		compatible = "qcom,msm_pcie";

		cell-index = <0>;

		qcom,ctrl-amt = <1>;

		reg = <0xfc520000 0x2000>,

		      <0xfc526000 0x1000>,

		      <0xff000000 0x1000>,

		      <0xff001000 0x1000>,

		      <0xff100000 0x1000>,

		      <0xff200000 0xe00000>;

		reg-names = "parf", "phy", "dm_core", "elbi",

				"conf", "bars";

		#address-cells = <0>;

		interrupt-parent = <&pcie0>;

		interrupts = <0 1 2 3 4 5 6 7 8 9 10 11 12>;

		#interrupt-cells = <1>;

		interrupt-map-mask = <0xffffffff>;

		interrupt-map = <0 &intc 0 243 0

				1 &intc 0 244 0

				2 &intc 0 245 0

				3 &intc 0 247 0

				4 &intc 0 248 0

				5 &intc 0 249 0

				6 &intc 0 250 0

				7 &intc 0 251 0

				8 &intc 0 252 0

				9 &intc 0 253 0

				10 &intc 0 254 0

				11 &intc 0 255 0

				12 &msmgpio 69 0x2>;

		interrupt-names = "int_msi", "int_a", "int_b", "int_c", "int_d",

				"int_pls_pme", "int_pme_legacy", "int_pls_err",

				"int_aer_legacy", "int_pls_link_up",

				"int_pls_link_down", "int_bridge_flush_n",

				"int_wake";

		perst-gpio = <&msmgpio 70 0>;

		wake-gpio = <&msmgpio 69 0>;

		clkreq-gpio = <&msmgpio 68 0>;

		gdsc_vdd-supply = <&gdsc_pcie_0>;

		vreg-1.8-supply = <&pma8084_l12>;

		vreg-0.9-supply = <&pma8084_l4>;

		vreg-3.3-supply = <&wlan_vreg>;

	};

	spmi_bus: qcom,spmi@fc4c0000 {

		cell-index = <0>;

		compatible = "qcom,spmi-pmic-arb";