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Commit dfad549d authored by Stephen Boyd's avatar Stephen Boyd Committed by Russell King
Browse files

ARM: 6826/1: Merge v6 and v7 DEBUG_LL DCC support 



The inline assembly differences for v6 vs. v7 are purely
optimizations. On a v7 processor, an mrc with the pc sets the
condition codes to the 28-31 bits of the register being read. It
just so happens that the TX/RX full bits the DCC support code is
testing for are high enough in the register to be put into the
condition codes. On a v6 processor, this "feature" isn't
implemented and thus we have to do the usual read, mask, test
operations to check for TX/RX full. Thus, we can drop the v7
implementation and just use the v6 implementation for both.

Cc: Tony Lindgren <tony@atomide.com>
Signed-off-by: default avatarStephen Boyd <sboyd@codeaurora.org>
Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
parent 8e880699

arch/arm/boot/compressed/head.S

+1 −9
Original line number Diff line number Diff line
@@ -21,20 +21,12 @@ 


#if defined(CONFIG_DEBUG_ICEDCC)



#if defined(CONFIG_CPU_V6) || defined(CONFIG_CPU_V6K)

#if defined(CONFIG_CPU_V6) || defined(CONFIG_CPU_V6K) || defined(CONFIG_CPU_V7)

		.macro	loadsp, rb, tmp

		.endm

		.macro	writeb, ch, rb

		mcr	p14, 0, \ch, c0, c5, 0

		.endm

#elif defined(CONFIG_CPU_V7)

		.macro	loadsp, rb, tmp

		.endm

		.macro	writeb, ch, rb

wait:		mrc	p14, 0, pc, c0, c1, 0

		bcs	wait

		mcr	p14, 0, \ch, c0, c5, 0

		.endm

#elif defined(CONFIG_CPU_XSCALE)

		.macro	loadsp, rb, tmp

		.endm

arch/arm/boot/compressed/misc.c

+1 −11
Original line number Diff line number Diff line
@@ -36,7 +36,7 @@ extern void error(char *x); 


#ifdef CONFIG_DEBUG_ICEDCC



#if defined(CONFIG_CPU_V6) || defined(CONFIG_CPU_V6K)

#if defined(CONFIG_CPU_V6) || defined(CONFIG_CPU_V6K) || defined(CONFIG_CPU_V7)



static void icedcc_putc(int ch)

{
@@ -52,16 +52,6 @@ static void icedcc_putc(int ch) 
	asm("mcr p14, 0, %0, c0, c5, 0" : : "r" (ch));

}



#elif defined(CONFIG_CPU_V7)



static void icedcc_putc(int ch)

{

	asm(

	"wait:	mrc	p14, 0, pc, c0, c1, 0			\n\

		bcs	wait					\n\

		mcr     p14, 0, %0, c0, c5, 0			"

	: : "r" (ch));

}



#elif defined(CONFIG_CPU_XSCALE)

arch/arm/kernel/debug.S

+1 −18
Original line number Diff line number Diff line
@@ -25,7 +25,7 @@ 
		.macro	addruart, rp, rv

		.endm



#if defined(CONFIG_CPU_V6) || defined(CONFIG_CPU_V6K)

#if defined(CONFIG_CPU_V6) || defined(CONFIG_CPU_V6K) || defined(CONFIG_CPU_V7)



		.macro	senduart, rd, rx

		mcr	p14, 0, \rd, c0, c5, 0
@@ -49,23 +49,6 @@ 
1002:

		.endm



#elif defined(CONFIG_CPU_V7)



		.macro	senduart, rd, rx

		mcr	p14, 0, \rd, c0, c5, 0

		.endm



		.macro	busyuart, rd, rx

busy:		mrc	p14, 0, pc, c0, c1, 0

		bcs	busy

		.endm



		.macro	waituart, rd, rx

wait:		mrc	p14, 0, pc, c0, c1, 0

		bcs	wait



		.endm



#elif defined(CONFIG_CPU_XSCALE)



		.macro	senduart, rd, rx