Commit deb052f1 authored Oct 20, 2014 by Vikram Mulukutla

clk: qcom: clock-generic: Fix parent selection loop exit condition



Previously, if a new parent was selected because it was
already at the necessary rate, the mux_set_rate logic
would short-circuit the parent selection loop before running
through all parents. This invalidates the try_new_parent
optimization which requires that we run through all the
parents, calling clk_round_rate on each one. Fix the for
loop conditional to reflect this.

Change-Id: Ic94a889dcd9ca393a19c7bd82ff26a192935811c
Signed-off-by: Vikram Mulukutla <markivx@codeaurora.org>

parent 01e0be45

drivers/clk/qcom/clock-generic.c

+1 −1

Original line number	Diff line number	Diff line
		@@ -113,7 +113,7 @@ static int mux_set_rate(struct clk *c, unsigned long rate)
		if (new_parent == c->parent && rate == c->rate)
		return 0;

		for (i = 0; i < mux->num_parents && !new_parent; i++) {
		for (i = 0; i < mux->num_parents && !(!i && new_parent); i++) {
		if (clk_round_rate(mux->parents[i].src, rate) == rate) {
		new_parent = mux->parents[i].src;
		if (!mux->try_new_parent)