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Commit deaf391b authored by Michael Chan's avatar Michael Chan Committed by David S. Miller
Browse files

[BNX2]: Add bnx2_set_default_link(). 



Put existing code to setup the default link settings in this new
function.  This makes it easier to support the remote PHY feature in
the next few patches.

Also change ETHTOOL_ALL_FIBRE_SPEED to include 2500Mbps if supported.

Signed-off-by: default avatarMichael Chan <mchan@broadcom.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 5faf4153

drivers/net/bnx2.c

+25 −18
Original line number Diff line number Diff line
@@ -1323,6 +1323,8 @@ bnx2_setup_serdes_phy(struct bnx2 *bp) 
}



#define ETHTOOL_ALL_FIBRE_SPEED						\

	(bp->phy_flags & PHY_2_5G_CAPABLE_FLAG) ?			\

		(ADVERTISED_2500baseX_Full | ADVERTISED_1000baseT_Full) :\

		(ADVERTISED_1000baseT_Full)



#define ETHTOOL_ALL_COPPER_SPEED					\
@@ -1335,6 +1337,27 @@ bnx2_setup_serdes_phy(struct bnx2 *bp) 


#define PHY_ALL_1000_SPEED (ADVERTISE_1000HALF | ADVERTISE_1000FULL)



static void

bnx2_set_default_link(struct bnx2 *bp)

{

	bp->autoneg = AUTONEG_SPEED | AUTONEG_FLOW_CTRL;

	bp->req_line_speed = 0;

	if (bp->phy_flags & PHY_SERDES_FLAG) {

		u32 reg;



		bp->advertising = ETHTOOL_ALL_FIBRE_SPEED | ADVERTISED_Autoneg;



		reg = REG_RD_IND(bp, bp->shmem_base + BNX2_PORT_HW_CFG_CONFIG);

		reg &= BNX2_PORT_HW_CFG_CFG_DFLT_LINK_MASK;

		if (reg == BNX2_PORT_HW_CFG_CFG_DFLT_LINK_1G) {

			bp->autoneg = 0;

			bp->req_line_speed = bp->line_speed = SPEED_1000;

			bp->req_duplex = DUPLEX_FULL;

		}

	} else

		bp->advertising = ETHTOOL_ALL_COPPER_SPEED | ADVERTISED_Autoneg;

}



static int

bnx2_setup_copper_phy(struct bnx2 *bp)

{
@@ -6374,23 +6397,7 @@ bnx2_init_board(struct pci_dev *pdev, struct net_device *dev) 
		}

	}



	bp->autoneg = AUTONEG_SPEED | AUTONEG_FLOW_CTRL;

	bp->req_line_speed = 0;

	if (bp->phy_flags & PHY_SERDES_FLAG) {

		bp->advertising = ETHTOOL_ALL_FIBRE_SPEED | ADVERTISED_Autoneg;



		reg = REG_RD_IND(bp, bp->shmem_base + BNX2_PORT_HW_CFG_CONFIG);

		reg &= BNX2_PORT_HW_CFG_CFG_DFLT_LINK_MASK;

		if (reg == BNX2_PORT_HW_CFG_CFG_DFLT_LINK_1G) {

			bp->autoneg = 0;

			bp->req_line_speed = bp->line_speed = SPEED_1000;

			bp->req_duplex = DUPLEX_FULL;

		}

	}

	else {

		bp->advertising = ETHTOOL_ALL_COPPER_SPEED | ADVERTISED_Autoneg;

	}



	bnx2_set_default_link(bp);

	bp->req_flow_ctrl = FLOW_CTRL_RX | FLOW_CTRL_TX;



	init_timer(&bp->timer);