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Commit de8e047a authored by Linux Build Service Account's avatar Linux Build Service Account Committed by Gerrit - the friendly Code Review server
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Merge "msm: Add cpp in msm8994 device tree and defconfig"

parents 20ca4951 53f0313b

Documentation/devicetree/bindings/media/video/msm-cpp.txt

+25 −17
Original line number Diff line number Diff line
@@ -14,23 +14,31 @@ Required properties: 
- interrupt-names : should specify relevant names to each interrupts

  property defined.

- vdd-supply: phandle to GDSC regulator controlling VFE & CPP core.

- clock-names: name of the clocks required for the device

- clock-rates: clock rate in Hz

- clocks: list of phandles to the clock controller device and coresponding

  clock names.

- clock-names: name of the clocks required for the device used by the consumer.

- clock-rates: clock rate in Hz.



Example:



   qcom,cpp@0xfda04000 {

	qcom,cpp@fda04000 {

		cell-index = <0>;

		compatible = "qcom,cpp";

       reg = <0xfda04000 0x100>;

             <0xfda40000 0x200>;

             <0xfd180000 0x008>;

		reg = <0xfda04000 0x100>,

			<0xfda80000 0x200>,

			<0xfda18000 0x008>;

		reg-names = "cpp", "cpp_vbif", "cpp_hw";

		interrupts = <0 49 0>;

		interrupt-names = "cpp";

		vdd-supply = <&gdsc_vfe>;

	clock-names = "camss_top_ahb_clk", "vfe_clk_src",

			"camss_vfe_vfe_clk", "iface_clk", "cpp_core_clk",

			"cpp_iface_clk", "cpp_bus_clk", "micro_iface_clk";

	qcom,clock-rates = <0 266670000 0 0 266670000 0 0 0>;

		clocks = <&clock_mmss clk_camss_top_ahb_clk>,

			<&clock_mmss clk_cpp_clk_src>,

			<&clock_mmss clk_camss_vfe_cpp_ahb_clk>,

			<&clock_mmss clk_camss_vfe_cpp_axi_clk>,

			<&clock_mmss clk_camss_vfe_cpp_clk>,

			<&clock_mmss clk_camss_micro_ahb_clk>;

		clock-names = "camss_top_ahb_clk", "cpp_clk_src",

			"camss_vfe_cpp_ahb_clk", "camss_vfe_cpp_axi_clk",

			"camss_vfe_cpp_clk","camss_micro_ahb_clk";

		clock-rates = <0 266670000 0 0 266670000 0>;

	};

arch/arm/boot/dts/qcom/msm8994-camera.dtsi

+11 −7
Original line number Diff line number Diff line
@@ -241,20 +241,24 @@ 


	qcom,cpp@fda04000 {

		cell-index = <0>;

		status = "disabled";

		compatible = "qcom,cpp";

		reg = <0xfda04000 0x100>,

			<0xfda40000 0x200>,

			<0xfda80000 0x200>,

			<0xfda18000 0x008>;

		reg-names = "cpp", "cpp_vbif", "cpp_hw";

		interrupts = <0 49 0>;

		interrupt-names = "cpp";

		vdd-supply = <&gdsc_vfe>;

		qcom,clock-names = "camss_top_ahb_clk", "vfe_clk_src",

			"camss_vfe_vfe_clk", "iface_clk", "cpp_core_clk",

			"cpp_iface_clk", "cpp_bus_clk", "micro_iface_clk",

			"camss_ahb_clk";

		qcom,clock-rates = <0 266670000 0 0 266670000 0 0 0 0>;

		clocks = <&clock_mmss clk_camss_top_ahb_clk>,

			<&clock_mmss clk_cpp_clk_src>,

			<&clock_mmss clk_camss_vfe_cpp_ahb_clk>,

			<&clock_mmss clk_camss_vfe_cpp_axi_clk>,

			<&clock_mmss clk_camss_vfe_cpp_clk>,

			<&clock_mmss clk_camss_micro_ahb_clk>;

		clock-names = "camss_top_ahb_clk", "cpp_clk_src",

			"camss_vfe_cpp_ahb_clk", "camss_vfe_cpp_axi_clk",

			"camss_vfe_cpp_clk","camss_micro_ahb_clk";

		clock-rates = <0 266670000 0 0 266670000 0>;

	};



	qcom,fd@fd878000 {