Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit de4207a8 authored by bait_dispatcher_monitor_system's avatar bait_dispatcher_monitor_system Committed by Gerrit - the friendly Code Review server
Browse files

Merge "msm: mdss: Add dt support to enable clk lane recovery"

parents 7c9ca7d6 96659a9b

Documentation/devicetree/bindings/fb/mdss-dsi-ctrl.txt

+2 −0
Original line number Diff line number Diff line
@@ -77,6 +77,7 @@ Optional properties: 
- qcom,mmss-phyreset-ctrl-offset:	Specifies the offset for dsi phy reset control register.

- qcom,dsi-irq-line:			Boolean specifies if DSI has a different irq line than mdp.

- qcom,timing-db-mode:			Boolean specifies dsi timing mode registers are supported or not.

- qcom,dsi-clk-ln-recovery:		Boolean which enables the clk lane recovery



Example:

        mdss_dsi0: qcom,mdss_dsi@fd922800 {
@@ -117,6 +118,7 @@ Example: 
		qcom,dsi-panel-bias-vreg;

		qcom,dsi-irq-line;

		qcom,timing-db-mode;

		qcom,dsi-clk-ln-recovery;



		qcom,core-supply-entries {

			#address-cells = <1>;

arch/arm/boot/dts/qcom/msm8994-mdss.dtsi

+2 −0
Original line number Diff line number Diff line
@@ -282,6 +282,7 @@ 
		qcom,mmss-ulp-clamp-ctrl-offset = <0x14>;

		qcom,mmss-phyreset-ctrl-offset = <0x108>;

		qcom,timing-db-mode;

		qcom,dsi-clk-ln-recovery;



		qcom,core-supply-entries {

			#address-cells = <1>;
@@ -398,6 +399,7 @@ 
		qcom,mmss-ulp-clamp-ctrl-offset = <0x14>;

		qcom,mmss-phyreset-ctrl-offset = <0x108>;

		qcom,timing-db-mode;

		qcom,dsi-clk-ln-recovery;



		qcom,core-supply-entries {

			#address-cells = <1>;

drivers/video/msm/mdss/mdss_dsi.c

+4 −0
Original line number Diff line number Diff line
@@ -1723,6 +1723,10 @@ static int mdss_dsi_ctrl_probe(struct platform_device *pdev) 
		goto error_pan_node;

	}



	ctrl_pdata->cmd_clk_ln_recovery_en =

		of_property_read_bool(pdev->dev.of_node,

			"qcom,dsi-clk-ln-recovery");



	if (mdss_dsi_is_te_based_esd(ctrl_pdata)) {

		rc = devm_request_irq(&pdev->dev,

			gpio_to_irq(ctrl_pdata->disp_te_gpio),

drivers/video/msm/mdss/mdss_dsi.h

+1 −0
Original line number Diff line number Diff line
@@ -342,6 +342,7 @@ struct mdss_dsi_ctrl_pdata { 
	bool dsi_irq_line;

	atomic_t te_irq_ready;



	bool cmd_clk_ln_recovery_en;

	bool cmd_sync_wait_broadcast;

	bool cmd_sync_wait_trigger;

drivers/video/msm/mdss/mdss_dsi_host.c

+8 −6
Original line number Diff line number Diff line
@@ -2100,13 +2100,14 @@ int mdss_dsi_cmdlist_commit(struct mdss_dsi_ctrl_pdata *ctrl, int from_mdp) 
		 * alway set.

		 */

		if (!roi || (roi->w != 0 || roi->h != 0)) {

			if (ctrl->hw_rev == MDSS_DSI_HW_REV_103 &&

			if (ctrl->cmd_clk_ln_recovery_en &&

					ctrl->panel_mode == DSI_CMD_MODE)

				mdss_dsi_start_hs_clk_lane(ctrl);

		}

	} else {	/* from dcs send */

		if (ctrl->hw_rev == MDSS_DSI_HW_REV_103 &&

				ctrl->panel_mode == DSI_CMD_MODE)

		if (ctrl->cmd_clk_ln_recovery_en &&

				ctrl->panel_mode == DSI_CMD_MODE &&

				(req->flags & CMD_REQ_HS_MODE))

			mdss_dsi_cmd_start_hs_clk_lane(ctrl);

	}
@@ -2180,8 +2181,9 @@ need_lock: 


		mutex_unlock(&ctrl->cmd_mutex);

	} else {	/* from dcs send */

		if (ctrl->hw_rev == MDSS_DSI_HW_REV_103 &&

				ctrl->panel_mode == DSI_CMD_MODE)

		if (ctrl->cmd_clk_ln_recovery_en &&

				ctrl->panel_mode == DSI_CMD_MODE &&

				(req->flags & CMD_REQ_HS_MODE))

			mdss_dsi_cmd_stop_hs_clk_lane(ctrl);

	}
@@ -2493,7 +2495,7 @@ irqreturn_t mdss_dsi_isr(int irq, void *ptr) 
		MDSS_XLOG(ctrl->ndx, ctrl->mdp_busy, isr, 0x99);

		spin_lock(&ctrl->mdp_lock);

		mdss_dsi_disable_irq_nosync(ctrl, DSI_MDP_TERM);

		if (ctrl->hw_rev == MDSS_DSI_HW_REV_103 &&

		if (ctrl->cmd_clk_ln_recovery_en &&

				ctrl->panel_mode == DSI_CMD_MODE) {

			dsi_send_events(ctrl, DSI_EV_STOP_HS_CLK_LANE,

							DSI_MDP_TERM);