Loading Documentation/devicetree/bindings/regulator/gdsc-regulator.txt +2 −1 Original line number Diff line number Diff line Loading @@ -28,7 +28,8 @@ Optional properties: turned on and disabled before turning off gdsc. This will be used in susbsystems where reset is synchronous and root clk is active without sw being aware of its state. state. The clock-name which denotes the root clock should be named as "core_root_clk". Example: gdsc_oxili_gx: qcom,gdsc@fd8c4024 { Loading arch/arm/boot/dts/qcom/msm8916.dtsi +1 −1 Original line number Diff line number Diff line Loading @@ -1779,7 +1779,7 @@ }; &gdsc_oxili_gx { clock-names = "core_clk"; clock-names = "core_root_clk"; clocks = <&clock_gcc clk_gfx3d_clk_src>; qcom,enable-root-clk; status = "okay"; Loading arch/arm/boot/dts/qcom/msm8939-common.dtsi +2 −1 Original line number Diff line number Diff line Loading @@ -1578,8 +1578,9 @@ }; &gdsc_oxili_gx { clock-names = "core_clk", "gmem_clk"; clock-names = "core_root_clk", "core_clk", "gmem_clk"; clocks = <&clock_gcc clk_gfx3d_clk_src>, <&clock_gcc clk_gcc_oxili_gfx3d_clk>, <&clock_gcc clk_gcc_oxili_gmem_clk>; qcom,enable-root-clk; status = "okay"; Loading drivers/clk/qcom/gdsc.c +23 −10 Original line number Diff line number Diff line Loading @@ -52,6 +52,7 @@ struct gdsc { bool toggle_logic; bool resets_asserted; bool root_en; int root_clk_idx; }; static int gdsc_is_enabled(struct regulator_dev *rdev) Loading @@ -70,10 +71,8 @@ static int gdsc_enable(struct regulator_dev *rdev) uint32_t regval; int i, ret; if (sc->root_en) { for (i = 0; i < sc->clock_count; i++) clk_prepare_enable(sc->clocks[i]); } if (sc->root_en) clk_prepare_enable(sc->clocks[sc->root_clk_idx]); if (sc->toggle_logic) { regval = readl_relaxed(sc->gdscr); Loading @@ -99,11 +98,14 @@ static int gdsc_enable(struct regulator_dev *rdev) } } else { for (i = 0; i < sc->clock_count; i++) if (likely(i != sc->root_clk_idx)) clk_reset(sc->clocks[i], CLK_RESET_DEASSERT); sc->resets_asserted = false; } for (i = 0; i < sc->clock_count; i++) { if (unlikely(i == sc->root_clk_idx)) continue; if (sc->toggle_mem) clk_set_flags(sc->clocks[i], CLKFLAG_RETAIN_MEM); if (sc->toggle_periph) Loading @@ -128,6 +130,8 @@ static int gdsc_disable(struct regulator_dev *rdev) int i, ret = 0; for (i = sc->clock_count-1; i >= 0; i--) { if (unlikely(i == sc->root_clk_idx)) continue; if (sc->toggle_mem) clk_set_flags(sc->clocks[i], CLKFLAG_NORETAIN_MEM); if (sc->toggle_periph) Loading @@ -153,14 +157,13 @@ static int gdsc_disable(struct regulator_dev *rdev) sc->rdesc.name, regval); } else { for (i = sc->clock_count-1; i >= 0; i--) if (likely(i != sc->root_clk_idx)) clk_reset(sc->clocks[i], CLK_RESET_ASSERT); sc->resets_asserted = true; } if (sc->root_en) { for (i = sc->clock_count-1; i >= 0; i--) clk_disable_unprepare(sc->clocks[i]); } if (sc->root_en) clk_disable_unprepare(sc->clocks[sc->root_clk_idx]); return ret; } Loading Loading @@ -295,6 +298,8 @@ static int gdsc_probe(struct platform_device *pdev) if (!sc->clocks) return -ENOMEM; sc->root_clk_idx = -1; sc->root_en = of_property_read_bool(pdev->dev.of_node, "qcom,enable-root-clk"); Loading @@ -310,6 +315,14 @@ static int gdsc_probe(struct platform_device *pdev) clock_name); return rc; } if (!strcmp(clock_name, "core_root_clk")) sc->root_clk_idx = i; } if (sc->root_en && (sc->root_clk_idx == -1)) { dev_err(&pdev->dev, "Failed to get root clock name\n"); return -EINVAL; } sc->rdesc.id = atomic_inc_return(&gdsc_count); Loading Loading
Documentation/devicetree/bindings/regulator/gdsc-regulator.txt +2 −1 Original line number Diff line number Diff line Loading @@ -28,7 +28,8 @@ Optional properties: turned on and disabled before turning off gdsc. This will be used in susbsystems where reset is synchronous and root clk is active without sw being aware of its state. state. The clock-name which denotes the root clock should be named as "core_root_clk". Example: gdsc_oxili_gx: qcom,gdsc@fd8c4024 { Loading
arch/arm/boot/dts/qcom/msm8916.dtsi +1 −1 Original line number Diff line number Diff line Loading @@ -1779,7 +1779,7 @@ }; &gdsc_oxili_gx { clock-names = "core_clk"; clock-names = "core_root_clk"; clocks = <&clock_gcc clk_gfx3d_clk_src>; qcom,enable-root-clk; status = "okay"; Loading
arch/arm/boot/dts/qcom/msm8939-common.dtsi +2 −1 Original line number Diff line number Diff line Loading @@ -1578,8 +1578,9 @@ }; &gdsc_oxili_gx { clock-names = "core_clk", "gmem_clk"; clock-names = "core_root_clk", "core_clk", "gmem_clk"; clocks = <&clock_gcc clk_gfx3d_clk_src>, <&clock_gcc clk_gcc_oxili_gfx3d_clk>, <&clock_gcc clk_gcc_oxili_gmem_clk>; qcom,enable-root-clk; status = "okay"; Loading
drivers/clk/qcom/gdsc.c +23 −10 Original line number Diff line number Diff line Loading @@ -52,6 +52,7 @@ struct gdsc { bool toggle_logic; bool resets_asserted; bool root_en; int root_clk_idx; }; static int gdsc_is_enabled(struct regulator_dev *rdev) Loading @@ -70,10 +71,8 @@ static int gdsc_enable(struct regulator_dev *rdev) uint32_t regval; int i, ret; if (sc->root_en) { for (i = 0; i < sc->clock_count; i++) clk_prepare_enable(sc->clocks[i]); } if (sc->root_en) clk_prepare_enable(sc->clocks[sc->root_clk_idx]); if (sc->toggle_logic) { regval = readl_relaxed(sc->gdscr); Loading @@ -99,11 +98,14 @@ static int gdsc_enable(struct regulator_dev *rdev) } } else { for (i = 0; i < sc->clock_count; i++) if (likely(i != sc->root_clk_idx)) clk_reset(sc->clocks[i], CLK_RESET_DEASSERT); sc->resets_asserted = false; } for (i = 0; i < sc->clock_count; i++) { if (unlikely(i == sc->root_clk_idx)) continue; if (sc->toggle_mem) clk_set_flags(sc->clocks[i], CLKFLAG_RETAIN_MEM); if (sc->toggle_periph) Loading @@ -128,6 +130,8 @@ static int gdsc_disable(struct regulator_dev *rdev) int i, ret = 0; for (i = sc->clock_count-1; i >= 0; i--) { if (unlikely(i == sc->root_clk_idx)) continue; if (sc->toggle_mem) clk_set_flags(sc->clocks[i], CLKFLAG_NORETAIN_MEM); if (sc->toggle_periph) Loading @@ -153,14 +157,13 @@ static int gdsc_disable(struct regulator_dev *rdev) sc->rdesc.name, regval); } else { for (i = sc->clock_count-1; i >= 0; i--) if (likely(i != sc->root_clk_idx)) clk_reset(sc->clocks[i], CLK_RESET_ASSERT); sc->resets_asserted = true; } if (sc->root_en) { for (i = sc->clock_count-1; i >= 0; i--) clk_disable_unprepare(sc->clocks[i]); } if (sc->root_en) clk_disable_unprepare(sc->clocks[sc->root_clk_idx]); return ret; } Loading Loading @@ -295,6 +298,8 @@ static int gdsc_probe(struct platform_device *pdev) if (!sc->clocks) return -ENOMEM; sc->root_clk_idx = -1; sc->root_en = of_property_read_bool(pdev->dev.of_node, "qcom,enable-root-clk"); Loading @@ -310,6 +315,14 @@ static int gdsc_probe(struct platform_device *pdev) clock_name); return rc; } if (!strcmp(clock_name, "core_root_clk")) sc->root_clk_idx = i; } if (sc->root_en && (sc->root_clk_idx == -1)) { dev_err(&pdev->dev, "Failed to get root clock name\n"); return -EINVAL; } sc->rdesc.id = atomic_inc_return(&gdsc_count); Loading