Loading Documentation/devicetree/bindings/arm/msm/clock-controller.txt +2 −1 Original line number Diff line number Diff line Loading @@ -18,7 +18,8 @@ Required properties: memory mapped registers. - reg-names: Names of the bases for the above registers. Currently, there is one expected base: "cc_base". Optional reg-names are "apcs_base" and "meas". reg-names are "apcs_base", "meas", "mmss_base", "lpass_base". Optional properties: - vdd_dig-supply: The digital logic rail supply. Loading arch/arm/boot/dts/qcom/msm8226-regulator.dtsi +0 −3 Original line number Diff line number Diff line Loading @@ -132,7 +132,6 @@ regulator-min-microvolt = <1>; regulator-max-microvolt = <7>; qcom,use-voltage-corner; qcom,consumer-supplies = "vdd_dig", ""; }; pm8226_s1_corner_ao: regulator-s1-corner-ao { compatible = "qcom,rpm-smd-regulator"; Loading @@ -141,7 +140,6 @@ regulator-min-microvolt = <1>; regulator-max-microvolt = <7>; qcom,use-voltage-corner; qcom,consumer-supplies = "vdd_sr2_dig", ""; }; pm8226_s1_floor_corner: regulator-s1-floor-corner { compatible = "qcom,rpm-smd-regulator"; Loading Loading @@ -292,7 +290,6 @@ regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; qcom,init-voltage = <1800000>; qcom,consumer-supplies = "vdd_sr2_pll", ""; }; pm8226_l8_so: regulator-l8-so { Loading arch/arm/boot/dts/qcom/msm8226-v2.dtsi +4 −0 Original line number Diff line number Diff line Loading @@ -66,6 +66,10 @@ qcom,chipid = <0x03000512>; }; &clock_gcc { compatible = "qcom,gcc-8226-v2"; }; &soc { qcom,clock-a7@f9011050 { reg = <0xf9011050 0x8>, Loading arch/arm/boot/dts/qcom/msm8226.dtsi +14 −0 Original line number Diff line number Diff line Loading @@ -973,6 +973,20 @@ qcom,scl-gpio = <&msmgpio 19 0>; }; clock_gcc: qcom,gcc@fc400000 { compatible = "qcom,gcc-8226"; reg = <0xfc400000 0x4000>, <0xfd8c0000 0x40000>, <0xfe000000 0x40000>, <0xf9011000 0x1000>, <0xf9016000 0x40>; reg-names = "cc_base", "mmss_base", "lpass_base", "meas", "apcs_base"; vdd_dig-supply = <&pm8226_s1_corner>; vdd_sr2_pll-supply = <&pm8226_l8_ao>; vdd_sr2_dig-supply = <&pm8226_s1_corner_ao>; }; qcom,clock-a7@f9011050 { compatible = "qcom,clock-a7-8226"; reg = <0xf9011050 0x8>; Loading arch/arm/boot/dts/qcom/msm8926.dtsi +4 −0 Original line number Diff line number Diff line Loading @@ -49,6 +49,10 @@ linux,memory-limit = <0x0>; }; &clock_gcc { compatible = "qcom,gcc-8226-v2"; }; &soc { qcom,mss@fc880000 { reg = <0xfc880000 0x100>, Loading Loading
Documentation/devicetree/bindings/arm/msm/clock-controller.txt +2 −1 Original line number Diff line number Diff line Loading @@ -18,7 +18,8 @@ Required properties: memory mapped registers. - reg-names: Names of the bases for the above registers. Currently, there is one expected base: "cc_base". Optional reg-names are "apcs_base" and "meas". reg-names are "apcs_base", "meas", "mmss_base", "lpass_base". Optional properties: - vdd_dig-supply: The digital logic rail supply. Loading
arch/arm/boot/dts/qcom/msm8226-regulator.dtsi +0 −3 Original line number Diff line number Diff line Loading @@ -132,7 +132,6 @@ regulator-min-microvolt = <1>; regulator-max-microvolt = <7>; qcom,use-voltage-corner; qcom,consumer-supplies = "vdd_dig", ""; }; pm8226_s1_corner_ao: regulator-s1-corner-ao { compatible = "qcom,rpm-smd-regulator"; Loading @@ -141,7 +140,6 @@ regulator-min-microvolt = <1>; regulator-max-microvolt = <7>; qcom,use-voltage-corner; qcom,consumer-supplies = "vdd_sr2_dig", ""; }; pm8226_s1_floor_corner: regulator-s1-floor-corner { compatible = "qcom,rpm-smd-regulator"; Loading Loading @@ -292,7 +290,6 @@ regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; qcom,init-voltage = <1800000>; qcom,consumer-supplies = "vdd_sr2_pll", ""; }; pm8226_l8_so: regulator-l8-so { Loading
arch/arm/boot/dts/qcom/msm8226-v2.dtsi +4 −0 Original line number Diff line number Diff line Loading @@ -66,6 +66,10 @@ qcom,chipid = <0x03000512>; }; &clock_gcc { compatible = "qcom,gcc-8226-v2"; }; &soc { qcom,clock-a7@f9011050 { reg = <0xf9011050 0x8>, Loading
arch/arm/boot/dts/qcom/msm8226.dtsi +14 −0 Original line number Diff line number Diff line Loading @@ -973,6 +973,20 @@ qcom,scl-gpio = <&msmgpio 19 0>; }; clock_gcc: qcom,gcc@fc400000 { compatible = "qcom,gcc-8226"; reg = <0xfc400000 0x4000>, <0xfd8c0000 0x40000>, <0xfe000000 0x40000>, <0xf9011000 0x1000>, <0xf9016000 0x40>; reg-names = "cc_base", "mmss_base", "lpass_base", "meas", "apcs_base"; vdd_dig-supply = <&pm8226_s1_corner>; vdd_sr2_pll-supply = <&pm8226_l8_ao>; vdd_sr2_dig-supply = <&pm8226_s1_corner_ao>; }; qcom,clock-a7@f9011050 { compatible = "qcom,clock-a7-8226"; reg = <0xf9011050 0x8>; Loading
arch/arm/boot/dts/qcom/msm8926.dtsi +4 −0 Original line number Diff line number Diff line Loading @@ -49,6 +49,10 @@ linux,memory-limit = <0x0>; }; &clock_gcc { compatible = "qcom,gcc-8226-v2"; }; &soc { qcom,mss@fc880000 { reg = <0xfc880000 0x100>, Loading