Loading Documentation/devicetree/bindings/arm/msm/imem.txt +11 −0 Original line number Diff line number Diff line Loading @@ -28,6 +28,12 @@ Required properties: -compatible: "qti,msm-imem-boot_stats" -reg: start address and size of boot_stats region in imem Cache error reporting: ----------------- Required properties: -compatible: "qti,msm-imem-cache_erp" -reg: start address and size of cache_erp region in imem Example: qti,msm-imem { Loading @@ -37,6 +43,11 @@ Example: #address-cells = <1>; #size-cells = <1>; imem_cache_erp: cache_erp@6a4 { compatible = "qti,msm-imem-cache_erp"; reg = <0x6a4 4>; }; boot_stats@6b0 { compatible = "qti,msm-imem-boot_stats"; reg = <0x6b0 32>; Loading Documentation/devicetree/bindings/cache/msm_cache_erp.txt +3 −0 Original line number Diff line number Diff line Loading @@ -6,6 +6,7 @@ Required properties: the L2 cache interrupt number - interrupt-names: Should contain the interrupt names "l1_irq" and "l2_irq" - qti,msm-imem-phandle: phandle reference to the imem cache erp node Optional properties: - reg: A set of I/O regions to be dumped in the event of a hardware fault being Loading Loading @@ -38,4 +39,6 @@ Example with "reg" property defined: compatible = "qti,cache_erp"; interrupts = <1 9 0>, <0 2 0>; interrupt-names = "l1_irq", "l2_irq"; qti,msm-imem-phandle = <&imem_cache_erp>; }; arch/arm/boot/dts/qti/apq8084.dtsi +6 −0 Original line number Diff line number Diff line Loading @@ -236,6 +236,7 @@ compatible = "qti,cache_erp"; interrupts = <1 9 0>, <0 2 0>; interrupt-names = "l1_irq", "l2_irq"; qti,msm-imem-phandle = <&imem_cache_erp>; }; qcom,cache_dump { Loading @@ -257,6 +258,11 @@ #address-cells = <1>; #size-cells = <1>; imem_cache_erp: cache_erp@6a4 { compatible = "qti,msm-imem-cache_erp"; reg = <0x6a4 4>; }; boot_stats@6b0 { compatible = "qti,msm-imem-boot_stats"; reg = <0x6b0 32>; Loading arch/arm/boot/dts/qti/fsm9900.dtsi +6 −0 Original line number Diff line number Diff line Loading @@ -291,6 +291,11 @@ #address-cells = <1>; #size-cells = <1>; imem_cache_erp: cache_erp@6a4 { compatible = "qti,msm-imem-cache_erp"; reg = <0x6a4 4>; }; boot_stats@6b0 { compatible = "qti,msm-imem-boot_stats"; reg = <0x6b0 32>; Loading @@ -306,6 +311,7 @@ compatible = "qti,cache_erp"; interrupts = <1 9 0>, <0 2 0>; interrupt-names = "l1_irq", "l2_irq"; qti,msm-imem-phandle = <&imem_cache_erp>; }; qcom,cache_dump { Loading arch/arm/boot/dts/qti/msm8974-v1.dtsi +5 −0 Original line number Diff line number Diff line Loading @@ -50,6 +50,11 @@ #address-cells = <1>; #size-cells = <1>; imem_cache_erp: cache_erp@6a4 { compatible = "qti,msm-imem-cache_erp"; reg = <0x6a4 4>; }; boot_stats@6b0 { compatible = "qti,msm-imem-boot_stats"; reg = <0x6b0 32>; Loading Loading
Documentation/devicetree/bindings/arm/msm/imem.txt +11 −0 Original line number Diff line number Diff line Loading @@ -28,6 +28,12 @@ Required properties: -compatible: "qti,msm-imem-boot_stats" -reg: start address and size of boot_stats region in imem Cache error reporting: ----------------- Required properties: -compatible: "qti,msm-imem-cache_erp" -reg: start address and size of cache_erp region in imem Example: qti,msm-imem { Loading @@ -37,6 +43,11 @@ Example: #address-cells = <1>; #size-cells = <1>; imem_cache_erp: cache_erp@6a4 { compatible = "qti,msm-imem-cache_erp"; reg = <0x6a4 4>; }; boot_stats@6b0 { compatible = "qti,msm-imem-boot_stats"; reg = <0x6b0 32>; Loading
Documentation/devicetree/bindings/cache/msm_cache_erp.txt +3 −0 Original line number Diff line number Diff line Loading @@ -6,6 +6,7 @@ Required properties: the L2 cache interrupt number - interrupt-names: Should contain the interrupt names "l1_irq" and "l2_irq" - qti,msm-imem-phandle: phandle reference to the imem cache erp node Optional properties: - reg: A set of I/O regions to be dumped in the event of a hardware fault being Loading Loading @@ -38,4 +39,6 @@ Example with "reg" property defined: compatible = "qti,cache_erp"; interrupts = <1 9 0>, <0 2 0>; interrupt-names = "l1_irq", "l2_irq"; qti,msm-imem-phandle = <&imem_cache_erp>; };
arch/arm/boot/dts/qti/apq8084.dtsi +6 −0 Original line number Diff line number Diff line Loading @@ -236,6 +236,7 @@ compatible = "qti,cache_erp"; interrupts = <1 9 0>, <0 2 0>; interrupt-names = "l1_irq", "l2_irq"; qti,msm-imem-phandle = <&imem_cache_erp>; }; qcom,cache_dump { Loading @@ -257,6 +258,11 @@ #address-cells = <1>; #size-cells = <1>; imem_cache_erp: cache_erp@6a4 { compatible = "qti,msm-imem-cache_erp"; reg = <0x6a4 4>; }; boot_stats@6b0 { compatible = "qti,msm-imem-boot_stats"; reg = <0x6b0 32>; Loading
arch/arm/boot/dts/qti/fsm9900.dtsi +6 −0 Original line number Diff line number Diff line Loading @@ -291,6 +291,11 @@ #address-cells = <1>; #size-cells = <1>; imem_cache_erp: cache_erp@6a4 { compatible = "qti,msm-imem-cache_erp"; reg = <0x6a4 4>; }; boot_stats@6b0 { compatible = "qti,msm-imem-boot_stats"; reg = <0x6b0 32>; Loading @@ -306,6 +311,7 @@ compatible = "qti,cache_erp"; interrupts = <1 9 0>, <0 2 0>; interrupt-names = "l1_irq", "l2_irq"; qti,msm-imem-phandle = <&imem_cache_erp>; }; qcom,cache_dump { Loading
arch/arm/boot/dts/qti/msm8974-v1.dtsi +5 −0 Original line number Diff line number Diff line Loading @@ -50,6 +50,11 @@ #address-cells = <1>; #size-cells = <1>; imem_cache_erp: cache_erp@6a4 { compatible = "qti,msm-imem-cache_erp"; reg = <0x6a4 4>; }; boot_stats@6b0 { compatible = "qti,msm-imem-boot_stats"; reg = <0x6b0 32>; Loading