Loading Documentation/devicetree/bindings/i2c/i2c-qup.txt +27 −21 Original line number Diff line number Diff line Loading @@ -19,6 +19,10 @@ Required properties: - qcom,i2c-bus-freq : desired I2C bus clock frequency is Hz Optional property: - qcom,noise-rjct-scl : Number of low samples on clock line to consider it low. Range of values is 0-3. When missing default to 0. - qcom,noise-rjct-sda : Number of low samples on data line to consider it low. Range of values is 0-3. When missing default to 0. - qcom,i2c-src-freq : Frequency of the source clocking this bus in Hz. Divider value is set based on soruce-frequency and desired I2C bus frequency. If this value is not Loading Loading @@ -48,6 +52,8 @@ Example: reg = <0xf9966000 0x1000>; reg-names = "qup_phys_addr"; interrupts = <0 104 0>; qcom,noise-rjct-scl = <1>; qcom,noise-rjct-sda = <1>; interrupt-names = "qup_err_intr"; qcom,i2c-bus-freq = <100000>; qcom,i2c-src-freq = <24000000>; Loading arch/arm/mach-msm/include/mach/board.h +6 −0 Original line number Diff line number Diff line Loading @@ -535,6 +535,10 @@ struct msm_mhl_platform_data { * events. * @master_id master id number of the i2c core or its wrapper (BLSP/GSBI). * When zero, clock path voting is disabled. * @noise_rjct_sda Number of low samples on data line to consider it low. * Range of values is 0-3. When missing default to 0. * @noise_rjct_scl Number of low samples on clock line to consider it low. * Range of values is 0-3. When missing default to 0. */ struct msm_i2c_platform_data { int clk_freq; Loading @@ -547,6 +551,8 @@ struct msm_i2c_platform_data { int aux_clk; int aux_dat; int src_clk_rate; int noise_rjct_sda; int noise_rjct_scl; int use_gsbi_shared_mode; int keep_ahb_clk_on; void (*msm_i2c_config_gpio)(int iface, int config_type); Loading drivers/i2c/busses/i2c-qup.c +12 −1 Original line number Diff line number Diff line Loading @@ -143,6 +143,11 @@ enum msm_i2c_state { #define QUP_OUT_FIFO_NOT_EMPTY 0x10 #define I2C_GPIOS_DT_CNT (2) /* sda and scl */ /* Register:QUP_I2C_MASTER_CLK_CTL field setters */ #define QUP_I2C_SCL_NOISE_REJECTION(reg_val, noise_rej_val) \ (((reg_val) & ~(0x3 << 24)) | (((noise_rej_val) & 0x3) << 24)) #define QUP_I2C_SDA_NOISE_REJECTION(reg_val, noise_rej_val) \ (((reg_val) & ~(0x3 << 26)) | (((noise_rej_val) & 0x3) << 26)) static char const * const i2c_rsrcs[] = {"i2c_clk", "i2c_sda"}; static struct gpiomux_setting recovery_config = { Loading Loading @@ -1061,6 +1066,10 @@ qup_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[], int num) / dev->pdata->clk_freq) / 2) - 3; hs_div = 3; dev->clk_ctl = ((hs_div & 0x7) << 8) | (fs_div & 0xff); dev->clk_ctl = QUP_I2C_SCL_NOISE_REJECTION( dev->clk_ctl, dev->pdata->noise_rjct_scl); dev->clk_ctl = QUP_I2C_SDA_NOISE_REJECTION( dev->clk_ctl, dev->pdata->noise_rjct_sda); fifo_reg = readl_relaxed(dev->base + QUP_IO_MODE); if (fifo_reg & 0x3) dev->out_blk_sz = (fifo_reg & 0x3) * 16; Loading Loading @@ -1386,6 +1395,8 @@ int msm_i2c_rsrcs_dt_to_pdata_map(struct platform_device *pdev, {"qcom,scl-gpio", gpios, DT_OPTIONAL, DT_GPIO, -1}, {"qcom,sda-gpio", gpios + 1, DT_OPTIONAL, DT_GPIO, -1}, {"qcom,clk-ctl-xfer", &pdata->clk_ctl_xfer, DT_OPTIONAL, DT_BOOL, -1}, {"qcom,noise-rjct-scl", &pdata->noise_rjct_scl, DT_OPTIONAL, DT_U32, 0}, {"qcom,noise-rjct-sda", &pdata->noise_rjct_sda, DT_OPTIONAL, DT_U32, 0}, {NULL, NULL, 0, 0, 0}, }; Loading Loading
Documentation/devicetree/bindings/i2c/i2c-qup.txt +27 −21 Original line number Diff line number Diff line Loading @@ -19,6 +19,10 @@ Required properties: - qcom,i2c-bus-freq : desired I2C bus clock frequency is Hz Optional property: - qcom,noise-rjct-scl : Number of low samples on clock line to consider it low. Range of values is 0-3. When missing default to 0. - qcom,noise-rjct-sda : Number of low samples on data line to consider it low. Range of values is 0-3. When missing default to 0. - qcom,i2c-src-freq : Frequency of the source clocking this bus in Hz. Divider value is set based on soruce-frequency and desired I2C bus frequency. If this value is not Loading Loading @@ -48,6 +52,8 @@ Example: reg = <0xf9966000 0x1000>; reg-names = "qup_phys_addr"; interrupts = <0 104 0>; qcom,noise-rjct-scl = <1>; qcom,noise-rjct-sda = <1>; interrupt-names = "qup_err_intr"; qcom,i2c-bus-freq = <100000>; qcom,i2c-src-freq = <24000000>; Loading
arch/arm/mach-msm/include/mach/board.h +6 −0 Original line number Diff line number Diff line Loading @@ -535,6 +535,10 @@ struct msm_mhl_platform_data { * events. * @master_id master id number of the i2c core or its wrapper (BLSP/GSBI). * When zero, clock path voting is disabled. * @noise_rjct_sda Number of low samples on data line to consider it low. * Range of values is 0-3. When missing default to 0. * @noise_rjct_scl Number of low samples on clock line to consider it low. * Range of values is 0-3. When missing default to 0. */ struct msm_i2c_platform_data { int clk_freq; Loading @@ -547,6 +551,8 @@ struct msm_i2c_platform_data { int aux_clk; int aux_dat; int src_clk_rate; int noise_rjct_sda; int noise_rjct_scl; int use_gsbi_shared_mode; int keep_ahb_clk_on; void (*msm_i2c_config_gpio)(int iface, int config_type); Loading
drivers/i2c/busses/i2c-qup.c +12 −1 Original line number Diff line number Diff line Loading @@ -143,6 +143,11 @@ enum msm_i2c_state { #define QUP_OUT_FIFO_NOT_EMPTY 0x10 #define I2C_GPIOS_DT_CNT (2) /* sda and scl */ /* Register:QUP_I2C_MASTER_CLK_CTL field setters */ #define QUP_I2C_SCL_NOISE_REJECTION(reg_val, noise_rej_val) \ (((reg_val) & ~(0x3 << 24)) | (((noise_rej_val) & 0x3) << 24)) #define QUP_I2C_SDA_NOISE_REJECTION(reg_val, noise_rej_val) \ (((reg_val) & ~(0x3 << 26)) | (((noise_rej_val) & 0x3) << 26)) static char const * const i2c_rsrcs[] = {"i2c_clk", "i2c_sda"}; static struct gpiomux_setting recovery_config = { Loading Loading @@ -1061,6 +1066,10 @@ qup_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[], int num) / dev->pdata->clk_freq) / 2) - 3; hs_div = 3; dev->clk_ctl = ((hs_div & 0x7) << 8) | (fs_div & 0xff); dev->clk_ctl = QUP_I2C_SCL_NOISE_REJECTION( dev->clk_ctl, dev->pdata->noise_rjct_scl); dev->clk_ctl = QUP_I2C_SDA_NOISE_REJECTION( dev->clk_ctl, dev->pdata->noise_rjct_sda); fifo_reg = readl_relaxed(dev->base + QUP_IO_MODE); if (fifo_reg & 0x3) dev->out_blk_sz = (fifo_reg & 0x3) * 16; Loading Loading @@ -1386,6 +1395,8 @@ int msm_i2c_rsrcs_dt_to_pdata_map(struct platform_device *pdev, {"qcom,scl-gpio", gpios, DT_OPTIONAL, DT_GPIO, -1}, {"qcom,sda-gpio", gpios + 1, DT_OPTIONAL, DT_GPIO, -1}, {"qcom,clk-ctl-xfer", &pdata->clk_ctl_xfer, DT_OPTIONAL, DT_BOOL, -1}, {"qcom,noise-rjct-scl", &pdata->noise_rjct_scl, DT_OPTIONAL, DT_U32, 0}, {"qcom,noise-rjct-sda", &pdata->noise_rjct_sda, DT_OPTIONAL, DT_U32, 0}, {NULL, NULL, 0, 0, 0}, }; Loading