Loading arch/arm/boot/dts/qcom/msm8916-coresight.dtsi +21 −0 Original line number Diff line number Diff line Loading @@ -412,4 +412,25 @@ coresight-name = "coresight-fuse"; coresight-nr-inports = <0>; }; hwevent: hwevent@86c000 { compatible = "qcom,coresight-hwevent"; reg = <0x86c000 0x104>, <0x86cfb0 0x4>, <0x86d000 0x24>, <0x86d030 0x40> <0x86dfb0 0x4>, <0x200C000 0x28>, <0x78d909c 0x8>; reg-names = "wrapper-mux", "wrapper-lockaccess", "debug-ui", "debug-ui-addr","debug-ui-lockaccess","spmi-mux", "usbbam-mux"; coresight-id = <28>; coresight-name = "coresight-hwevent"; coresight-nr-inports = <0>; clocks = <&clock_rpm clk_qdss_clk>, <&clock_rpm clk_qdss_a_clk>; clock-names = "core_clk", "core_a_clk"; }; }; Loading
arch/arm/boot/dts/qcom/msm8916-coresight.dtsi +21 −0 Original line number Diff line number Diff line Loading @@ -412,4 +412,25 @@ coresight-name = "coresight-fuse"; coresight-nr-inports = <0>; }; hwevent: hwevent@86c000 { compatible = "qcom,coresight-hwevent"; reg = <0x86c000 0x104>, <0x86cfb0 0x4>, <0x86d000 0x24>, <0x86d030 0x40> <0x86dfb0 0x4>, <0x200C000 0x28>, <0x78d909c 0x8>; reg-names = "wrapper-mux", "wrapper-lockaccess", "debug-ui", "debug-ui-addr","debug-ui-lockaccess","spmi-mux", "usbbam-mux"; coresight-id = <28>; coresight-name = "coresight-hwevent"; coresight-nr-inports = <0>; clocks = <&clock_rpm clk_qdss_clk>, <&clock_rpm clk_qdss_a_clk>; clock-names = "core_clk", "core_a_clk"; }; };