Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit dcaf6647 authored by Vince Leung's avatar Vince Leung
Browse files

ARM: dts: msm: decrease CPU DMA latency for msm8994 



Decrease the CPU DMA latency value for msm8994 from
701 to 301 for sdhc devices. This change improves
performance of IO workloads by over 50%.

Change-Id: I9a6090c507beb1e7a769a64739405fdb387654f6
Signed-off-by: default avatarVince Leung <vincentl@codeaurora.org>
parent d2a8c71b

arch/arm/boot/dts/qcom/msm8994.dtsi

+3 −3
Original line number Diff line number Diff line
@@ -952,7 +952,7 @@ 
		interrupt-names = "hc_irq", "pwr_irq";



		qcom,bus-width = <8>;

		qcom,cpu-dma-latency-us = <701>;

		qcom,cpu-dma-latency-us = <301>;



		qcom,msm-bus,name = "sdhc1";

		qcom,msm-bus,num-cases = <9>;
@@ -989,7 +989,7 @@ 
			 <&clock_gcc clk_gcc_sdcc2_apps_clk>;



		qcom,bus-width = <4>;

		qcom,cpu-dma-latency-us = <701>;

		qcom,cpu-dma-latency-us = <301>;



		qcom,msm-bus,name = "sdhc2";

		qcom,msm-bus,num-cases = <8>;
@@ -1021,7 +1021,7 @@ 
			 <&clock_gcc clk_gcc_sdcc3_apps_clk>;



		qcom,bus-width = <4>;

		qcom,cpu-dma-latency-us = <701>;

		qcom,cpu-dma-latency-us = <301>;



		qcom,msm-bus,name = "sdhc3";

		qcom,msm-bus,num-cases = <8>;