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Commit dbc6a719 authored by Azhar Shaikh's avatar Azhar Shaikh
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usb: dwc3-msm: Resume SS_PHY after enabling clocks 



commit 7a1311d3 "usb: dwc3-msm: Fix resume sequence when cable is
reconnected" introduced this issue. SS_PHY was resumed before
enabling clocks which resulted in unclocked register access.
So fix this by enabling the clocks before resuming SS_PHY.

CRs-fixed: 688312
Change-Id: Ic3621caf8878e6c6c02edf23461eeb74292d203b
Signed-off-by: default avatarAzhar Shaikh <azhars@codeaurora.org>
parent ff1ff8e0

drivers/usb/dwc3/dwc3-msm.c

+7 −4
Original line number Diff line number Diff line
@@ -1799,11 +1799,9 @@ static int dwc3_msm_resume(struct dwc3_msm *mdwc) 


	clk_prepare_enable(mdwc->utmi_clk);



	if (mdwc->lpm_flags & MDWC3_PHY_REF_CLK_OFF) {

	if (mdwc->lpm_flags & MDWC3_PHY_REF_CLK_OFF)

		clk_prepare_enable(mdwc->ref_clk);

		usb_phy_set_suspend(mdwc->ss_phy, 0);

		mdwc->lpm_flags &= ~MDWC3_PHY_REF_CLK_OFF;

	}



	usleep_range(1000, 1200);



	clk_prepare_enable(mdwc->iface_clk);
@@ -1812,6 +1810,11 @@ static int dwc3_msm_resume(struct dwc3_msm *mdwc) 
		mdwc->lpm_flags &= ~MDWC3_CORECLK_OFF;

	}



	if (mdwc->lpm_flags & MDWC3_PHY_REF_CLK_OFF) {

		usb_phy_set_suspend(mdwc->ss_phy, 0);

		mdwc->lpm_flags &= ~MDWC3_PHY_REF_CLK_OFF;

	}



	usb_phy_set_suspend(mdwc->hs_phy, 0);



	/* Recover from controller power collapse */