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Commit db72ee0f authored by Vikram Mulukutla's avatar Vikram Mulukutla Committed by Stephen Boyd
Browse files

msm: clock-8974: Add block reset support for the USB cores 



The USB 3.0, USBHS and USB HSIC cores require asynchronous block
reset support for correct operation in certain scenarios. Support
these resets by adding BCR_REG for the relevant clocks.

Change-Id: If4f47201c485ea2060d4b795e767a1c69d34d22e
Signed-off-by: default avatarVikram Mulukutla <markivx@codeaurora.org>
parent 67b0d250

arch/arm/mach-msm/clock-8974.c

+3 −0
Original line number Original line Diff line number Diff line
@@ -2115,6 +2115,7 @@ static struct branch_clk gcc_tsif_ref_clk = { 




static struct branch_clk gcc_usb30_master_clk = {

static struct branch_clk gcc_usb30_master_clk = {

	.cbcr_reg = USB30_MASTER_CBCR,

	.cbcr_reg = USB30_MASTER_CBCR,

	.bcr_reg = USB_30_BCR,

	.parent = &usb30_master_clk_src.c,

	.parent = &usb30_master_clk_src.c,

	.has_sibling = 1,

	.has_sibling = 1,

	.base = &virt_bases[GCC_BASE],

	.base = &virt_bases[GCC_BASE],
@@ -2149,6 +2150,7 @@ static struct branch_clk gcc_usb_hs_ahb_clk = { 




static struct branch_clk gcc_usb_hs_system_clk = {

static struct branch_clk gcc_usb_hs_system_clk = {

	.cbcr_reg = USB_HS_SYSTEM_CBCR,

	.cbcr_reg = USB_HS_SYSTEM_CBCR,

	.bcr_reg = USB_HS_BCR,

	.parent = &usb_hs_system_clk_src.c,

	.parent = &usb_hs_system_clk_src.c,

	.base = &virt_bases[GCC_BASE],

	.base = &virt_bases[GCC_BASE],

	.c = {

	.c = {
@@ -2171,6 +2173,7 @@ static struct branch_clk gcc_usb_hsic_ahb_clk = { 




static struct branch_clk gcc_usb_hsic_clk = {

static struct branch_clk gcc_usb_hsic_clk = {

	.cbcr_reg = USB_HSIC_CBCR,

	.cbcr_reg = USB_HSIC_CBCR,

	.bcr_reg = USB_HS_HSIC_BCR,

	.parent = &usb_hsic_clk_src.c,

	.parent = &usb_hsic_clk_src.c,

	.base = &virt_bases[GCC_BASE],

	.base = &virt_bases[GCC_BASE],

	.c = {

	.c = {