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Commit da0e02a1 authored by Santosh Shilimkar's avatar Santosh Shilimkar
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ARM: OMAP5: Update SAR RAM base address 



Update SAR RAM base address for OMAP5 based devices.

Signed-off-by: default avatarSantosh Shilimkar <santosh.shilimkar@ti.com>
parent 077173c0

arch/arm/mach-omap2/omap4-common.c

+8 −2
Original line number Diff line number Diff line
@@ -240,15 +240,21 @@ void __iomem *omap4_get_sar_ram_base(void) 
 */

static int __init omap4_sar_ram_init(void)

{

	unsigned long sar_base;



	/*

	 * To avoid code running on other OMAPs in

	 * multi-omap builds

	 */

	if (!cpu_is_omap44xx())

	if (cpu_is_omap44xx())

		sar_base = OMAP44XX_SAR_RAM_BASE;

	else if (soc_is_omap54xx())

		sar_base = OMAP54XX_SAR_RAM_BASE;

	else

		return -ENOMEM;



	/* Static mapping, never released */

	sar_ram_base = ioremap(OMAP44XX_SAR_RAM_BASE, SZ_16K);

	sar_ram_base = ioremap(sar_base, SZ_16K);

	if (WARN_ON(!sar_ram_base))

		return -ENOMEM;

arch/arm/mach-omap2/omap54xx.h

+1 −0
Original line number Diff line number Diff line
@@ -28,5 +28,6 @@ 
#define OMAP54XX_PRCM_MPU_BASE		0x48243000

#define OMAP54XX_SCM_BASE		0x4a002000

#define OMAP54XX_CTRL_BASE		0x4a002800

#define OMAP54XX_SAR_RAM_BASE		0x4ae26000



#endif /* __ASM_SOC_OMAP555554XX_H */