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Commit d9342941 authored by Padmanabhan Komanduru's avatar Padmanabhan Komanduru
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ARM: dts: msm: update the MDSS VBIF configuration for msm8916



On msm8916, there is no need to configure the DDR_FORCE_CLK_ON
register to force the VBIF clocks ON. Also, remove the DT entries for
register settings of DDR_OUT_MAX_BURST and DDR_RND_RBN_QOS_ARB since
the programmed value for these registers is same as the reset value.

Change-Id: I8ec00dc6787f88c7b63902facb6c14e96632fb2b
Signed-off-by: default avatarPadmanabhan Komanduru <pkomandu@codeaurora.org>
parent 13c60e82
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+0 −3
Original line number Diff line number Diff line
@@ -78,9 +78,6 @@
			 <&clock_gcc clk_gcc_mdss_vsync_clk>;
		clock-names = "iface_clk", "bus_clk", "core_clk_src",
				"core_clk", "vsync_clk";
		qcom,vbif-settings = <0x004 0x00000001>,
				     <0x0d8 0x00000707>,
				     <0x124 0x00000003>;
		qcom,mdp-settings = <0x000011e4 0x00000000>,
				    <0x00065048 0x00000008>,
				    <0x00065848 0x00000008>,