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Commit d7c9e1d3 authored by Stephen Boyd's avatar Stephen Boyd
Browse files

msm: clock-8960: Add support for QDSS RPM clocks 



The QDSS clocks are controlled by the RPM. Add support for these
clocks via the standard rpm clock driver so that the QDSS driver
can use standard clock APIs to control clocks.

Change-Id: I184d02d75695c36321cea014b34be30d74e9d5a3
Signed-off-by: default avatarStephen Boyd <sboyd@codeaurora.org>
parent 4cef572d

arch/arm/mach-msm/clock-8960.c

+7 −0
Original line number Diff line number Diff line
@@ -4583,6 +4583,7 @@ DEFINE_CLK_RPM(mmfab_clk, mmfab_a_clk, MM_FABRIC, NULL); 
DEFINE_CLK_RPM(mmfpb_clk, mmfpb_a_clk, MMFPB, NULL);

DEFINE_CLK_RPM(sfab_clk, sfab_a_clk, SYSTEM_FABRIC, NULL);

DEFINE_CLK_RPM(sfpb_clk, sfpb_a_clk, SFPB, NULL);

DEFINE_CLK_RPM_QDSS(qdss_clk, qdss_a_clk);



static DEFINE_CLK_VOTER(sfab_msmbus_a_clk, &sfab_a_clk.c, 0);

static DEFINE_CLK_VOTER(sfab_tmr_a_clk, &sfab_a_clk.c, 0);
@@ -5068,6 +5069,8 @@ static struct clk_lookup msm_clocks_8064[] = { 
	CLK_LOOKUP("mem_a_clk",		ebi1_msmbus_a_clk.c,	"msm_bus"),

	CLK_LOOKUP("dfab_clk",		dfab_msmbus_clk.c,	"msm_bus"),

	CLK_LOOKUP("dfab_a_clk",	dfab_msmbus_a_clk.c,	"msm_bus"),

	CLK_LOOKUP("core_clk",		qdss_clk.c,		"msm_qdss"),

	CLK_LOOKUP("core_a_clk",	qdss_a_clk.c,		"msm_qdss"),



	CLK_LOOKUP("ebi1_clk",		ebi1_clk.c,		""),

	CLK_LOOKUP("mmfpb_clk",		mmfpb_clk.c,		""),
@@ -5392,6 +5395,8 @@ static struct clk_lookup msm_clocks_8960[] = { 
	CLK_LOOKUP("mem_a_clk",		ebi1_msmbus_a_clk.c,	"msm_bus"),

	CLK_LOOKUP("dfab_clk",		dfab_msmbus_clk.c,	"msm_bus"),

	CLK_LOOKUP("dfab_a_clk",	dfab_msmbus_a_clk.c,	"msm_bus"),

	CLK_LOOKUP("core_clk",		qdss_clk.c,		"msm_qdss"),

	CLK_LOOKUP("core_a_clk",	qdss_a_clk.c,		"msm_qdss"),



	CLK_LOOKUP("ebi1_clk",		ebi1_clk.c,		NULL),

	CLK_LOOKUP("mmfpb_clk",		mmfpb_clk.c,		NULL),
@@ -5708,6 +5713,8 @@ static struct clk_lookup msm_clocks_8930[] = { 
	CLK_LOOKUP("mem_a_clk",		ebi1_msmbus_a_clk.c,	"msm_bus"),

	CLK_LOOKUP("dfab_clk",		dfab_msmbus_clk.c,	"msm_bus"),

	CLK_LOOKUP("dfab_a_clk",	dfab_msmbus_a_clk.c,	"msm_bus"),

	CLK_LOOKUP("core_clk",		qdss_clk.c,		"msm_qdss"),

	CLK_LOOKUP("core_a_clk",	qdss_a_clk.c,		"msm_qdss"),



	CLK_LOOKUP("ebi1_clk",		ebi1_clk.c,		NULL),

	CLK_LOOKUP("mmfpb_clk",		mmfpb_clk.c,		NULL),

arch/arm/mach-msm/clock-rpm.c

+3 −3
Original line number Diff line number Diff line
@@ -51,7 +51,7 @@ static int clk_rpmrs_get_rate(struct rpm_clk *r) 
	int rc;

	struct msm_rpm_iv_pair iv = { .id = r->rpm_status_id, };

	rc = msm_rpm_get_status(&iv, 1);

	return (rc < 0) ? rc : iv.value * 1000;

	return (rc < 0) ? rc : iv.value * r->factor;

}



#define RPM_SMD_KEY_RATE	0x007A484B
@@ -192,7 +192,7 @@ static int rpm_clk_set_rate(struct clk *clk, unsigned long rate) 
	unsigned long this_khz, this_sleep_khz;

	int rc = 0;



	this_khz = DIV_ROUND_UP(rate, 1000);

	this_khz = DIV_ROUND_UP(rate, r->factor);



	spin_lock_irqsave(&rpm_clock_lock, flags);
@@ -277,7 +277,7 @@ static enum handoff rpm_clk_handoff(struct clk *clk) 
	if (!r->branch) {

		r->last_set_khz = iv.value;

		r->last_set_sleep_khz = iv.value;

		clk->rate = iv.value * 1000;

		clk->rate = iv.value * r->factor;

	}



	return HANDOFF_ENABLED_CLK;

arch/arm/mach-msm/clock-rpm.h

+43 −0
Original line number Diff line number Diff line
@@ -32,6 +32,7 @@ struct rpm_clk { 
	unsigned last_set_sleep_khz;

	bool enabled;

	bool branch; /* true: RPM only accepts 1 for ON and 0 for OFF */

	unsigned factor;

	struct clk_rpmrs_data *rpmrs_data;



	struct rpm_clk *peer;
@@ -53,6 +54,7 @@ extern struct clk_rpmrs_data clk_rpmrs_data_smd; 
		.rpm_clk_id = (r_id), \

		.rpm_status_id = (stat_id), \

		.peer = &active, \

		.factor = 1000, \

		.rpmrs_data = (rpmrsdata),\

		.c = { \

			.ops = &clk_ops_rpm, \
@@ -68,6 +70,7 @@ extern struct clk_rpmrs_data clk_rpmrs_data_smd; 
		.rpm_status_id = (stat_id), \

		.peer = &name, \

		.active_only = true, \

		.factor = 1000, \

		.rpmrs_data = (rpmrsdata),\

		.c = { \

			.ops = &clk_ops_rpm, \
@@ -88,6 +91,7 @@ extern struct clk_rpmrs_data clk_rpmrs_data_smd; 
		.peer = &active, \

		.last_set_khz = ((r) / 1000), \

		.last_set_sleep_khz = ((r) / 1000), \

		.factor = 1000, \

		.branch = true, \

		.rpmrs_data = (rpmrsdata),\

		.c = { \
@@ -106,6 +110,7 @@ extern struct clk_rpmrs_data clk_rpmrs_data_smd; 
		.peer = &name, \

		.last_set_khz = ((r) / 1000), \

		.active_only = true, \

		.factor = 1000, \

		.branch = true, \

		.rpmrs_data = (rpmrsdata),\

		.c = { \
@@ -118,10 +123,48 @@ extern struct clk_rpmrs_data clk_rpmrs_data_smd; 
		}, \

	};



#define __DEFINE_CLK_RPM_QDSS(name, active, type, r_id, stat_id, rpmrsdata) \

	static struct rpm_clk active; \

	static struct rpm_clk name = { \

		.rpm_res_type = (type), \

		.rpm_clk_id = (r_id), \

		.rpm_status_id = (stat_id), \

		.peer = &active, \

		.factor = 1, \

		.rpmrs_data = (rpmrsdata),\

		.c = { \

			.ops = &clk_ops_rpm, \

			.flags = CLKFLAG_SKIP_AUTO_OFF, \

			.dbg_name = #name, \

			CLK_INIT(name.c), \

			.warned = true, \

		}, \

	}; \

	static struct rpm_clk active = { \

		.rpm_res_type = (type), \

		.rpm_clk_id = (r_id), \

		.rpm_status_id = (stat_id), \

		.peer = &name, \

		.active_only = true, \

		.factor = 1, \

		.rpmrs_data = (rpmrsdata),\

		.c = { \

			.ops = &clk_ops_rpm, \

			.flags = CLKFLAG_SKIP_AUTO_OFF, \

			.dbg_name = #active, \

			CLK_INIT(active.c), \

			.warned = true, \

		}, \

	};



#define DEFINE_CLK_RPM(name, active, r_id, dep) \

	__DEFINE_CLK_RPM(name, active, 0, MSM_RPM_ID_##r_id##_CLK, \

		MSM_RPM_STATUS_ID_##r_id##_CLK, dep, &clk_rpmrs_data)



#define DEFINE_CLK_RPM_QDSS(name, active) \

	__DEFINE_CLK_RPM_QDSS(name, active, 0, MSM_RPM_ID_QDSS_CLK, \

		MSM_RPM_STATUS_ID_QDSS_CLK, &clk_rpmrs_data)



#define DEFINE_CLK_RPM_BRANCH(name, active, r_id, r) \

	__DEFINE_CLK_RPM_BRANCH(name, active, 0, MSM_RPM_ID_##r_id##_CLK, \

			MSM_RPM_STATUS_ID_##r_id##_CLK, r, &clk_rpmrs_data)