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Commit d7b84769 authored by Junjie Wu's avatar Junjie Wu
Browse files

clock-gcc-8994: Associate reset with gcc_usb3_phy_pipe_clk



A standalone reset was provided for USB3PHY_PHY_BCR. Associate it
with gcc_usb3_phy_pipe_clk instead to keep it consistent with other
targets.

Change-Id: I9fe5965f59e8dff1e30967ecd9872054d5a48c52
Signed-off-by: default avatarJunjie Wu <junjiew@codeaurora.org>
parent fbb215d9
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+1 −11
Original line number Diff line number Diff line
@@ -1380,16 +1380,6 @@ static struct reset_clk gcc_usb3_phy_reset = {
	},
};

static struct reset_clk gcc_usb3phy_phy_reset = {
	.reset_reg = USB3PHY_PHY_BCR,
	.base = &virt_base,
	.c = {
		.dbg_name = "gcc_usb3phy_phy_reset",
		.ops = &clk_ops_rst,
		CLK_INIT(gcc_usb3phy_phy_reset.c),
	},
};

static struct gate_clk gpll0_out_mmsscc = {
	.en_reg = APCS_CLOCK_BRANCH_ENA_VOTE,
	.en_mask = BIT(26),
@@ -2440,6 +2430,7 @@ static struct branch_clk gcc_usb3_phy_aux_clk = {

static struct branch_clk gcc_usb3_phy_pipe_clk = {
	.cbcr_reg = USB3_PHY_PIPE_CBCR,
	.bcr_reg = USB3PHY_PHY_BCR,
	.has_sibling = 1,
	.base = &virt_base,
	.c = {
@@ -2691,7 +2682,6 @@ static struct clk_lookup msm_clocks_gcc_8994[] = {
	CLK_LIST(usb_hs_system_clk_src),
	CLK_LIST(gcc_qusb2_phy_reset),
	CLK_LIST(gcc_usb3_phy_reset),
	CLK_LIST(gcc_usb3phy_phy_reset),
	CLK_LIST(gpll0_out_mmsscc),
	CLK_LIST(pcie_0_phy_ldo),
	CLK_LIST(pcie_1_phy_ldo),
+0 −1
Original line number Diff line number Diff line
@@ -157,7 +157,6 @@
#define clk_usb_hs_system_clk_src 0x28385546
#define clk_gcc_qusb2_phy_reset 0x3ce5fa84
#define clk_gcc_usb3_phy_reset 0x03d559f1
#define clk_gcc_usb3phy_phy_reset 0xb1a4f885
#define clk_gpll0_out_mmsscc 0x0ded70aa
#define clk_pcie_0_phy_ldo 0x1d30d092
#define clk_pcie_1_phy_ldo 0x63474b42