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Commit d626dad9 authored by Linux Build Service Account's avatar Linux Build Service Account Committed by Gerrit - the friendly Code Review server
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Merge "ARM: dts: msm: Add GPU properties for MSM8994"

parents 14aa9844 0c4bfe6c
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/* Copyright (c) 2014, The Linux Foundation. All rights reserved.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 and
 * only version 2 as published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 */

&soc {
	msm_gpu: qcom,kgsl-3d0@fdb00000 {
		label = "kgsl-3d0";
		compatible = "qcom,kgsl-3d0", "qcom,kgsl-3d";
		reg = <0xfdb00000 0x20000
		       0xfdb20000 0x10000>;
		reg-names = "kgsl_3d0_reg_memory" , "kgsl_3d0_shader_memory";
		interrupts = <0 33 0>;
		interrupt-names = "kgsl_3d0_irq";
		qcom,id = <0>;

		qcom,chipid = <0x04030000>;

		qcom,initial-pwrlevel = <2>;

		qcom,idle-timeout = <8>; //<HZ/12>
		qcom,strtstp-sleepwake;

		/*
		 * Clocks = KGSL_CLK_CORE | KGSL_CLK_IFACE
		 */
		qcom,clk-map = <0x00000006>;

		clocks = <&clock_rpm clk_oxili_gfx3d_clk_src>,
			<&clock_mmss clk_oxilicx_ahb_clk>;
		clock-names = "core_clk", "iface_clk";

		/* Bus Scale Settings */
		qcom,bus-control;
		qcom,msm-bus,name = "grp3d";
		qcom,msm-bus,num-cases = <12>;
		qcom,msm-bus,num-paths = <2>;
		qcom,msm-bus,vectors-KBps =
				<26 512 0 0>, <89 662 0 0>,

				<26 512 0 1200000>,  <89 662 0 2880000>,     // gpu=180 bus=150
				<26 512 0 2400000>,  <89 662 0 2880000>,     // gpu=180 bus=300
				<26 512 0 3200000>,  <89 662 0 2880000>,     // gpu=180 bus=400

				<26 512 0 2400000>,  <89 662 0 4800000>,     // gpu=300 bus=300
				<26 512 0 4224000>,  <89 662 0 4800000>,     // gpu=300 bus=528
				<26 512 0 5376000>,  <89 662 0 4800000>,     // gpu=300 bus=672

				<26 512 0 5376000>,  <89 662 0 7200000>,     // gpu=450 bus=672
				<26 512 0 6681600>,  <89 662 0 7200000>,     // gpu=450 bus=835.2
				<26 512 0 8448000>,  <89 662 0 7200000>,     // gpu=450 bus=1056

				<26 512 0 8448000>,  <89 662 0 9200000>,     // gpu=575 bus=1056
				<26 512 0 12748800>, <89 662 0 9200000>;     // gpu=575 bus=1593.6

		/* GDSC oxili regulators */
		vddcx-supply = <&gdsc_oxili_cx>;
		vdd-supply = <&gdsc_oxili_gx>;

		/* IOMMU Data */
		iommu = <&kgsl_iommu>;

		/* Trace bus */
		coresight-id = <67>;
		coresight-name = "coresight-gfx";
		coresight-nr-inports = <0>;
		coresight-outports = <0>;
		coresight-child-list = <&funnel_in0>;
		coresight-child-ports = <4>;

		/* Power levels */
		qcom,gpu-pwrlevels {
			#address-cells = <1>;
			#size-cells = <0>;

			compatible = "qcom,gpu-pwrlevels";

			qcom,gpu-pwrlevel@0 {
				reg = <0>;
				qcom,gpu-freq = <575000000>;
				qcom,bus-freq = <11>;
				qcom,io-fraction = <33>;
			};

			qcom,gpu-pwrlevel@1 {
				reg = <1>;
				qcom,gpu-freq = <450000000>;
				qcom,bus-freq = <8>;
				qcom,io-fraction = <66>;
			};

			qcom,gpu-pwrlevel@2 {
				reg = <2>;
				qcom,gpu-freq = <300000000>;
				qcom,bus-freq = <5>;
				qcom,io-fraction = <66>;
			};

			qcom,gpu-pwrlevel@3 {
				reg = <3>;
				qcom,gpu-freq = <180000000>;
				qcom,bus-freq = <2>;
				qcom,io-fraction = <100>;
			};

			qcom,gpu-pwrlevel@4 {
				reg = <4>;
				qcom,gpu-freq = <27000000>;
				qcom,bus-freq = <0>;
				qcom,io-fraction = <0>;
			};
		};

	};
};
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@@ -1274,3 +1274,4 @@
#include "msm8994-iommu.dtsi"
#include "msm8994-iommu-domains.dtsi"
#include "msm8994-camera.dtsi"
#include "msm8994-gpu.dtsi"