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Commit d527b292 authored by Dhaval Patel's avatar Dhaval Patel
Browse files

msm: mdss: provide an exclusive access to QSEED2 block 



Calibration tool and pp module uses the QSEED2 block on
VIG pipe to set the sharpness. This sharpness effect
is overwritten when both modules tries to update it
at the same time. Hence, it is required to provide
an exclusive access to QSEED2 block when target is in
display tuning mode.

Change-Id: I41b85313e529a3cca70de7e652c3abb7d4defbca
Signed-off-by: default avatarDhaval Patel <pdhaval@codeaurora.org>
parent fdc49c46

drivers/video/msm/mdss/mdss_mdp_pp.c

+16 −7
Original line number Diff line number Diff line
@@ -201,6 +201,7 @@ static int mdss_mdp_hscl_filter[] = { 
#define MDSS_MDP_GAMUT_SIZE		0x5C

#define MDSS_MDP_IGC_DSPP_SIZE		0x28

#define MDSS_MDP_IGC_SSPP_SIZE		0x88

#define MDSS_MDP_VIG_QSEED2_SHARP_SIZE	0x0C

#define TOTAL_BLEND_STAGES		0x4



#define PP_FLAGS_DIRTY_PA	0x1
@@ -1009,11 +1010,15 @@ static int mdss_mdp_scale_setup(struct mdss_mdp_pipe *pipe) 
	u32 filter_mode;

	struct mdss_data_type *mdata;

	u32 src_w, src_h;

	u32 dcm_state = DCM_UNINIT;



	pr_debug("pipe=%d, change pxl ext=%d\n", pipe->num,

			pipe->scale.enable_pxl_ext);

	mdata = mdss_mdp_get_mdata();



	if (!pipe->mixer && !pipe->mixer->ctl && !pipe->mixer->ctl->mfd)

		dcm_state = pipe->mixer->ctl->mfd->dcm_state;



	if ((mdata->mdp_rev == MDSS_MDP_HW_REV_200) &&

		(pipe->type == MDSS_MDP_PIPE_TYPE_VIG))

		return mdss_mdp_hscl_setup(pipe);
@@ -1052,8 +1057,9 @@ static int mdss_mdp_scale_setup(struct mdss_mdp_pipe *pipe) 
		pipe->pp_cfg.sharp_cfg.noise_thr = SHARP_NOISE_THR_DEFAULT;

	}



	if ((pipe->src_fmt->is_yuv) &&

		!((pipe->dst.w < src_w) || (pipe->dst.h < src_h))) {

	if (dcm_state != DTM_ENTER &&

		((pipe->src_fmt->is_yuv) &&

		!((pipe->dst.w < src_w) || (pipe->dst.h < src_h)))) {

			pp_sharp_config(pipe->base +

			   MDSS_MDP_REG_VIG_QSEED2_SHARP,

			   &pipe->pp_res.pp_sts,
@@ -4818,7 +4824,10 @@ static int is_valid_calib_vig_addr(char __iomem *ptr) 
		} else if (ptr == base + MDSS_MDP_REG_SSPP_SRC_OP_MODE) {

			ret = MDP_PP_OPS_READ | MDP_PP_OPS_WRITE;

			break;

		} else if ((ptr == base + MDSS_MDP_REG_VIG_QSEED2_SHARP)) {

		/* QSEED2 range */

		} else if ((ptr >= base + MDSS_MDP_REG_VIG_QSEED2_SHARP) &&

				(ptr <= base + MDSS_MDP_REG_VIG_QSEED2_SHARP +

					MDSS_MDP_VIG_QSEED2_SHARP_SIZE)) {

			ret = MDP_PP_OPS_READ | MDP_PP_OPS_WRITE;

			break;

		/* PA range */