Merge "msm: kgsl: Per process pagetable feature fix for A4XX" (d2260074) · Commits · e / devices / android_kernel_sony_msm8994

drivers/gpu/msm/adreno.c

+24 −5

Original line number	Diff line number	Diff line
		@@ -828,6 +828,12 @@ static unsigned int _adreno_iommu_setstate_v1(struct kgsl_device *device,
		* glue commands together until next
		* WAIT_FOR_ME
		*/
		if (adreno_is_a4xx(adreno_dev))
		cmds += adreno_wait_reg_mem(cmds,
		adreno_getreg(adreno_dev,
		ADRENO_REG_CP_WFI_PEND_CTR),
		1, 0xFFFFFFFF, 0xF);
		else
		cmds += adreno_wait_reg_eq(cmds,
		adreno_getreg(adreno_dev,
		ADRENO_REG_CP_WFI_PEND_CTR),
		@@ -843,9 +849,18 @@ static unsigned int _adreno_iommu_setstate_v1(struct kgsl_device *device,
		*cmds++ =
		KGSL_IOMMU_IMPLDEF_MICRO_MMU_CTRL_HALT;
		/* wait for smmu to lock */
		cmds += adreno_wait_reg_eq(cmds, mmu_ctrl,
		if (adreno_is_a4xx(adreno_dev))
		cmds += adreno_wait_reg_mem(cmds,
		mmu_ctrl,
		KGSL_IOMMU_IMPLDEF_MICRO_MMU_CTRL_IDLE,
		KGSL_IOMMU_IMPLDEF_MICRO_MMU_CTRL_IDLE,
		KGSL_IOMMU_IMPLDEF_MICRO_MMU_CTRL_IDLE, 0xF);
		0xF);
		else
		cmds += adreno_wait_reg_eq(cmds,
		mmu_ctrl,
		KGSL_IOMMU_IMPLDEF_MICRO_MMU_CTRL_IDLE,
		KGSL_IOMMU_IMPLDEF_MICRO_MMU_CTRL_IDLE,
		0xF);
		}
		/* set ttbr0 */
		if (sizeof(phys_addr_t) > sizeof(unsigned long)) {
		@@ -891,6 +906,10 @@ static unsigned int _adreno_iommu_setstate_v1(struct kgsl_device *device,
		tlbstatus = kgsl_mmu_get_reg_ahbaddr(&device->mmu, i,
		KGSL_IOMMU_CONTEXT_USER,
		KGSL_IOMMU_CTX_TLBSTATUS) >> 2;
		if (adreno_is_a4xx(adreno_dev))
		cmds += adreno_wait_reg_mem(cmds, tlbstatus, 0,
		KGSL_IOMMU_CTX_TLBSTATUS_SACTIVE, 0xF);
		else
		cmds += adreno_wait_reg_eq(cmds, tlbstatus, 0,
		KGSL_IOMMU_CTX_TLBSTATUS_SACTIVE, 0xF);
		}

+22 −0

Original line number	Diff line number	Diff line
		@@ -766,6 +766,28 @@ static inline int adreno_add_idle_cmds(struct adreno_device *adreno_dev,
		return cmds - start;
		}


		/*
		* adreno_wait_reg_mem() - Add a CP_WAIT_REG_MEM command
		* @cmds: Pointer to memory where commands are to be added
		* @addr: Regiater address to poll for
		* @val: Value to poll for
		* @mask: The value against which register value is masked
		* @interval: wait interval
		*/
		static inline int adreno_wait_reg_mem(unsigned int *cmds, unsigned int addr,
		unsigned int val, unsigned int mask,
		unsigned int interval)
		{
		unsigned int *start = cmds;
		*cmds++ = cp_type3_packet(CP_WAIT_REG_MEM, 5);
		cmds++ = 0x3; / Function = Equals */
		cmds++ = addr; / Poll address */
		cmds++ = val; / ref val */
		*cmds++ = mask;
		*cmds++ = interval;
		return cmds - start;
		}
		/*
		* adreno_wait_reg_eq() - Add a CP_WAIT_REG_EQ command
		* @cmds: Pointer to memory where commands are to be added