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Commit d0c34729 authored by Senthil's avatar Senthil
Browse files

msm: camera: Query only AHB clks from dt in ISPIF



All clocks used by ISPIF are now added to DTSI.
Previously the code assumes only AHB clock is in DTSI.
Now the code is updated to query only the AHB clocks
out of all the clocks listed.

Change-Id: I7843e4eab2f0d14341a1ccb2978a84a23ed12f4d
Signed-off-by: default avatarSenthil <skrajago@codeaurora.org>
parent 593d5a19
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+23 −19
Original line number Diff line number Diff line
@@ -207,9 +207,10 @@ static int msm_ispif_reset_hw(struct ispif_device *ispif)
}

int msm_ispif_get_ahb_clk_info(struct ispif_device *ispif_dev,
	struct platform_device *pdev)
	struct platform_device *pdev,
	struct msm_cam_clk_info *ahb_clk_info)
{
	uint32_t count;
	uint32_t count, num_ahb_clk = 0;
	int i, rc;
	uint32_t rates[ISPIF_CLK_INFO_MAX];

@@ -230,29 +231,31 @@ int msm_ispif_get_ahb_clk_info(struct ispif_device *ispif_dev,
		return -EINVAL;
	}

	for (i = 0; i < count; i++) {
		rc = of_property_read_string_index(of_node, "clock-names",
				i, &(ispif_8974_ahb_clk_info[i].clk_name));
		CDBG("clock-names[%d] = %s\n",
			 i, ispif_8974_ahb_clk_info[i].clk_name);
	rc = of_property_read_u32_array(of_node, "qcom,clock-rates",
		rates, count);
	if (rc < 0) {
		pr_err("%s failed %d\n", __func__, __LINE__);
		return rc;
	}
	}
	rc = of_property_read_u32_array(of_node, "qcom,clock-rates",
		rates, count);
	for (i = 0; i < count; i++) {
		rc = of_property_read_string_index(of_node, "clock-names",
				i, &(ahb_clk_info[num_ahb_clk].clk_name));
		CDBG("clock-names[%d] = %s\n",
			 i, ahb_clk_info[i].clk_name);
		if (rc < 0) {
			pr_err("%s failed %d\n", __func__, __LINE__);
			return rc;
		}
	for (i = 0; i < count; i++) {
		ispif_8974_ahb_clk_info[i].clk_rate =
		if (strnstr(ahb_clk_info[num_ahb_clk].clk_name, "ahb",
			sizeof(ahb_clk_info[num_ahb_clk].clk_name))) {
			ahb_clk_info[num_ahb_clk].clk_rate =
				(rates[i] == 0) ? (long)-1 : rates[i];
			CDBG("clk_rate[%d] = %ld\n", i,
			 ispif_8974_ahb_clk_info[i].clk_rate);
				ahb_clk_info[i].clk_rate);
			num_ahb_clk++;
		}
	}
	ispif_dev->num_clk = count;
	ispif_dev->num_ahb_clk = num_ahb_clk;
	return 0;
}

@@ -265,7 +268,8 @@ static int msm_ispif_clk_ahb_enable(struct ispif_device *ispif, int enable)
		return 0;
	}

	rc = msm_ispif_get_ahb_clk_info(ispif, ispif->pdev);
	rc = msm_ispif_get_ahb_clk_info(ispif, ispif->pdev,
		ispif_8974_ahb_clk_info);
	if (rc < 0) {
		pr_err("%s: msm_isp_get_clk_info() failed", __func__);
			return -EFAULT;
@@ -273,7 +277,7 @@ static int msm_ispif_clk_ahb_enable(struct ispif_device *ispif, int enable)

	rc = msm_cam_clk_enable(&ispif->pdev->dev,
		ispif_8974_ahb_clk_info, ispif->ahb_clk,
		ispif->num_clk, enable);
		ispif->num_ahb_clk, enable);
	if (rc < 0) {
		pr_err("%s: cannot enable clock, error = %d",
			__func__, rc);
+1 −1
Original line number Diff line number Diff line
@@ -62,7 +62,7 @@ struct ispif_device {
	struct clk *ahb_clk[ISPIF_CLK_INFO_MAX];
	struct completion reset_complete[VFE_MAX];
	uint32_t hw_num_isps;
	uint32_t num_clk;
	uint32_t num_ahb_clk;
	uint32_t clk_idx;
};
#endif