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Commit d01bb071 authored by Casey Piper's avatar Casey Piper
Browse files

clk: qcom: mdss: add PLL clock support for 20nm HDMI PHY 



Add support for HDMI PLL on msm8994.
Support is added to register this new clock
driver. Also modify makefile to compile new
20nm PLL source and add support for registering
PLL clock driver for 20nm HDMI PHY.

Change-Id: I57421ac638075358c46ddd938e441a8e525f3a5a
Signed-off-by: default avatarCasey Piper <cpiper@codeaurora.org>
parent 02cf247c

Documentation/devicetree/bindings/fb/mdss-pll.txt

+2 −1
Original line number Diff line number Diff line
@@ -8,7 +8,8 @@ Required properties: 
- compatible:		Compatible name used in the driver. Should be one of:

			"qcom,mdss_dsi_pll_8916", "qcom,mdss_dsi_pll_8939",

			"qcom,mdss_dsi_pll_8974", "qcom,mdss_dsi_pll_8994",

			"qcom,mdss_dsi_pll_8994", "qcom,mdss_hdmi_pll"

			"qcom,mdss_dsi_pll_8994", "qcom,mdss_hdmi_pll",

			"qcom,mdss_hdmi_pll_8994"

- cell-index:		Specifies the controller used

- reg:			offset and length of the register set for the device.

- reg-names :		names to refer to register sets related to this device

drivers/clk/qcom/mdss/Makefile

+1 −0
Original line number Diff line number Diff line
@@ -6,3 +6,4 @@ obj-$(CONFIG_MSM_MDSS_PLL) += mdss-dsi-pll-28lpm.o 
obj-$(CONFIG_MSM_MDSS_PLL) += mdss-dsi-pll-20nm.o

obj-$(CONFIG_MSM_MDSS_PLL) += mdss-edp-pll-28hpm.o

obj-$(CONFIG_MSM_MDSS_PLL) += mdss-hdmi-pll-28hpm.o

obj-$(CONFIG_MSM_MDSS_PLL) += mdss-hdmi-pll-20nm.o