Loading Documentation/devicetree/bindings/usb/msm-hsusb.txt +7 −3 Original line number Diff line number Diff line Loading @@ -4,7 +4,12 @@ OTG: Required properties : - compatible : should be "qcom,hsusb-otg" - regs : offset and length of the register set in the memory map - regs : Array of offset and length of the register sets in the memory map - reg-names : indicates various iomem resources passed by name. The possible strings in this field are: "core": USB controller register space. (Required) "tcsr": TCSR register for routing USB Controller signals to either picoPHY0 or picoPHY1. (Optional) - interrupts: IRQ line - interrupt-names: OTG interrupt name(s) referenced in interrupts above HSUSB OTG expects "core_irq" which is IRQ line from CORE and Loading Loading @@ -32,8 +37,6 @@ Required properties : in microvolts or a value corresponding to voltage corner. Optional properties : - reg : offset and length of the TCSR register for routing USB Controller signals to either picoPHY0 or picoPHY1. - interrupt-names : Optional interrupt resource entries are: "async_irq" : Interrupt from HSPHY for asynchronous wakeup events in LPM. "pmic_id_irq" : Interrupt from PMIC for external ID pin notification. Loading Loading @@ -128,6 +131,7 @@ Example HSUSB OTG controller device node : usb@f9690000 { compatible = "qcom,hsusb-otg"; reg = <0xf9690000 0x400>; reg-names = "core"; interrupts = <134>; interrupt-names = "core_irq"; Loading arch/arm/boot/dts/qcom/apq8084.dtsi +1 −0 Original line number Diff line number Diff line Loading @@ -4277,6 +4277,7 @@ compatible = "qcom,hsusb-otg"; reg = <0xf9a55000 0x400>; reg-names = "core"; interrupts = <0 134 0 0 140 0>; interrupt-names = "core_irq", "async_irq"; HSUSB_VDDCX-supply = <&pma8084_s1>; Loading arch/arm/boot/dts/qcom/fsm9900.dtsi +1 −0 Original line number Diff line number Diff line Loading @@ -1623,6 +1623,7 @@ usb_otg: usb@f9a55000 { compatible = "qcom,hsusb-otg"; reg = <0xf9a55000 0x400>; reg-names = "core"; interrupts = <0 134 0 0 140 0>; interrupt-names = "core_irq", "async_irq"; HSUSB_VDDCX-supply = <&pma8084_s2>; Loading arch/arm/boot/dts/qcom/msm8226.dtsi +1 −0 Original line number Diff line number Diff line Loading @@ -339,6 +339,7 @@ usb_otg: usb@f9a55000 { compatible = "qcom,hsusb-otg"; reg = <0xf9a55000 0x400>; reg-names = "core"; interrupts = <0 134 0>, <0 140 0>; interrupt-names = "core_irq", "async_irq"; hsusb_vdd_dig-supply = <&pm8226_s1_corner>; Loading arch/arm/boot/dts/qcom/msm8610.dtsi +1 −0 Original line number Diff line number Diff line Loading @@ -328,6 +328,7 @@ usb@f9a55000 { compatible = "qcom,hsusb-otg"; reg = <0xf9a55000 0x400>; reg-names = "core"; interrupts = <0 134 0>, <0 140 0>; interrupt-names = "core_irq", "async_irq"; hsusb_vdd_dig-supply = <&pm8110_s1_corner>; Loading Loading
Documentation/devicetree/bindings/usb/msm-hsusb.txt +7 −3 Original line number Diff line number Diff line Loading @@ -4,7 +4,12 @@ OTG: Required properties : - compatible : should be "qcom,hsusb-otg" - regs : offset and length of the register set in the memory map - regs : Array of offset and length of the register sets in the memory map - reg-names : indicates various iomem resources passed by name. The possible strings in this field are: "core": USB controller register space. (Required) "tcsr": TCSR register for routing USB Controller signals to either picoPHY0 or picoPHY1. (Optional) - interrupts: IRQ line - interrupt-names: OTG interrupt name(s) referenced in interrupts above HSUSB OTG expects "core_irq" which is IRQ line from CORE and Loading Loading @@ -32,8 +37,6 @@ Required properties : in microvolts or a value corresponding to voltage corner. Optional properties : - reg : offset and length of the TCSR register for routing USB Controller signals to either picoPHY0 or picoPHY1. - interrupt-names : Optional interrupt resource entries are: "async_irq" : Interrupt from HSPHY for asynchronous wakeup events in LPM. "pmic_id_irq" : Interrupt from PMIC for external ID pin notification. Loading Loading @@ -128,6 +131,7 @@ Example HSUSB OTG controller device node : usb@f9690000 { compatible = "qcom,hsusb-otg"; reg = <0xf9690000 0x400>; reg-names = "core"; interrupts = <134>; interrupt-names = "core_irq"; Loading
arch/arm/boot/dts/qcom/apq8084.dtsi +1 −0 Original line number Diff line number Diff line Loading @@ -4277,6 +4277,7 @@ compatible = "qcom,hsusb-otg"; reg = <0xf9a55000 0x400>; reg-names = "core"; interrupts = <0 134 0 0 140 0>; interrupt-names = "core_irq", "async_irq"; HSUSB_VDDCX-supply = <&pma8084_s1>; Loading
arch/arm/boot/dts/qcom/fsm9900.dtsi +1 −0 Original line number Diff line number Diff line Loading @@ -1623,6 +1623,7 @@ usb_otg: usb@f9a55000 { compatible = "qcom,hsusb-otg"; reg = <0xf9a55000 0x400>; reg-names = "core"; interrupts = <0 134 0 0 140 0>; interrupt-names = "core_irq", "async_irq"; HSUSB_VDDCX-supply = <&pma8084_s2>; Loading
arch/arm/boot/dts/qcom/msm8226.dtsi +1 −0 Original line number Diff line number Diff line Loading @@ -339,6 +339,7 @@ usb_otg: usb@f9a55000 { compatible = "qcom,hsusb-otg"; reg = <0xf9a55000 0x400>; reg-names = "core"; interrupts = <0 134 0>, <0 140 0>; interrupt-names = "core_irq", "async_irq"; hsusb_vdd_dig-supply = <&pm8226_s1_corner>; Loading
arch/arm/boot/dts/qcom/msm8610.dtsi +1 −0 Original line number Diff line number Diff line Loading @@ -328,6 +328,7 @@ usb@f9a55000 { compatible = "qcom,hsusb-otg"; reg = <0xf9a55000 0x400>; reg-names = "core"; interrupts = <0 134 0>, <0 140 0>; interrupt-names = "core_irq", "async_irq"; hsusb_vdd_dig-supply = <&pm8110_s1_corner>; Loading