Loading arch/arm/boot/dts/mpq8092-iommu-domains.dtsi +27 −0 Original line number Diff line number Diff line Loading @@ -27,5 +27,32 @@ qcom,virtual-addr-pool = <0x1000000 0x3f000000>; qcom,secure-domain; }; bcast_domain_hlos: qcom,iommu-domain3 { label = "bcast_hlos"; qcom,iommu-contexts = <&bcast_cb0_hlos>; qcom,virtual-addr-pool = <0x00001000 0x70000000 0x80000000 0x80000000>; }; bcast_domain_cpz: qcom,iommu-domain4 { label = "bcast_cpz"; qcom,iommu-contexts = <&bcast_cb1_cpz>; qcom,virtual-addr-pool = <0x00001000 0x80000000>; qcom,secure-domain; }; bcast_domain_demod: qcom,iommu-domain5 { label = "bcast_demod"; qcom,iommu-contexts = <&bcast_cb2_demod>; qcom,virtual-addr-pool = <0x00000000 0x80000000>; }; bcast_domain_apz: qcom,iommu-domain6 { label = "bcast_apz"; qcom,iommu-contexts = <&bcast_cb3_apz>; qcom,virtual-addr-pool = <0x00001000 0x80000000>; qcom,secure-domain; }; }; }; arch/arm/boot/dts/mpq8092.dtsi +28 −0 Original line number Diff line number Diff line Loading @@ -342,6 +342,34 @@ qcom,irq-no-suspend; }; }; tspp2: msm_tspp2@fc724000 { compatible = "qcom,msm_tspp2"; cell-index = <0>; reg = <0xfc724000 0x7000>, /* MSM_TSPP2 */ <0xfc72b000 0x0200>, /* MSM_TSIF0 */ <0xfc72b200 0x0200>, /* MSM_TSIF1 */ <0xfc704000 0x20000>; /* MSM_TSPP2_BAM */ reg-names = "MSM_TSPP2", "MSM_TSIF0", "MSM_TSIF1", "MSM_TSPP2_BAM"; interrupts = <0 265 0>, /* TSPP2 */ <0 263 0>, /* TSIF0 */ <0 264 0>, /* TSIF1 */ <0 262 0>; /* TSIF_BAM */ interrupt-names = "TSPP2", "TSIF0", "TSIF1", "TSPP2_BAM"; qcom,tspp2-ahb-clk = "bcc_tspp2_ahb_clk"; qcom,tspp2-core-clk = "bcc_tspp2_core_clk"; qcom,tsif-ref-clk = "tsif_ref_clk_src"; qcom,iommu-hlos-group = "bcast_hlos"; qcom,iommu-hlos-partition = <0>; qcom,iommu-cpz-group = "bcast_cpz"; qcom,iommu-cpz-partition = <0>; }; }; &gdsc_venus { Loading arch/arm/boot/dts/msm-iommu-v1.dtsi +4 −4 Original line number Diff line number Diff line Loading @@ -1278,7 +1278,7 @@ 0x0 0x0>; qcom,iommu-ctx@fc73c000 { bcast_cb0_hlos: qcom,iommu-ctx@fc73c000 { compatible = "qcom,msm-smmu-v1-ctx"; reg = <0xfc73c000 0x1000>; interrupts = <0 276 0>; Loading @@ -1289,7 +1289,7 @@ label = "bcast_cb0_hlos"; }; qcom,iommu-ctx@fc73d000 { bcast_cb1_cpz: qcom,iommu-ctx@fc73d000 { compatible = "qcom,msm-smmu-v1-ctx"; reg = <0xfc73d000 0x1000>; interrupts = <0 276 0>; Loading @@ -1300,7 +1300,7 @@ label = "bcast_cb1_cpz"; }; qcom,iommu-ctx@fc73e000 { bcast_cb2_demod: qcom,iommu-ctx@fc73e000 { compatible = "qcom,msm-smmu-v1-ctx"; reg = <0xfc73e000 0x1000>; interrupts = <0 276 0>; Loading @@ -1308,7 +1308,7 @@ label = "bcast_cb2_demod"; }; qcom,iommu-ctx@fc73f000 { bcast_cb3_apz: qcom,iommu-ctx@fc73f000 { compatible = "qcom,msm-smmu-v1-ctx"; reg = <0xfc73f000 0x1000>; interrupts = <0 276 0>; Loading Loading
arch/arm/boot/dts/mpq8092-iommu-domains.dtsi +27 −0 Original line number Diff line number Diff line Loading @@ -27,5 +27,32 @@ qcom,virtual-addr-pool = <0x1000000 0x3f000000>; qcom,secure-domain; }; bcast_domain_hlos: qcom,iommu-domain3 { label = "bcast_hlos"; qcom,iommu-contexts = <&bcast_cb0_hlos>; qcom,virtual-addr-pool = <0x00001000 0x70000000 0x80000000 0x80000000>; }; bcast_domain_cpz: qcom,iommu-domain4 { label = "bcast_cpz"; qcom,iommu-contexts = <&bcast_cb1_cpz>; qcom,virtual-addr-pool = <0x00001000 0x80000000>; qcom,secure-domain; }; bcast_domain_demod: qcom,iommu-domain5 { label = "bcast_demod"; qcom,iommu-contexts = <&bcast_cb2_demod>; qcom,virtual-addr-pool = <0x00000000 0x80000000>; }; bcast_domain_apz: qcom,iommu-domain6 { label = "bcast_apz"; qcom,iommu-contexts = <&bcast_cb3_apz>; qcom,virtual-addr-pool = <0x00001000 0x80000000>; qcom,secure-domain; }; }; };
arch/arm/boot/dts/mpq8092.dtsi +28 −0 Original line number Diff line number Diff line Loading @@ -342,6 +342,34 @@ qcom,irq-no-suspend; }; }; tspp2: msm_tspp2@fc724000 { compatible = "qcom,msm_tspp2"; cell-index = <0>; reg = <0xfc724000 0x7000>, /* MSM_TSPP2 */ <0xfc72b000 0x0200>, /* MSM_TSIF0 */ <0xfc72b200 0x0200>, /* MSM_TSIF1 */ <0xfc704000 0x20000>; /* MSM_TSPP2_BAM */ reg-names = "MSM_TSPP2", "MSM_TSIF0", "MSM_TSIF1", "MSM_TSPP2_BAM"; interrupts = <0 265 0>, /* TSPP2 */ <0 263 0>, /* TSIF0 */ <0 264 0>, /* TSIF1 */ <0 262 0>; /* TSIF_BAM */ interrupt-names = "TSPP2", "TSIF0", "TSIF1", "TSPP2_BAM"; qcom,tspp2-ahb-clk = "bcc_tspp2_ahb_clk"; qcom,tspp2-core-clk = "bcc_tspp2_core_clk"; qcom,tsif-ref-clk = "tsif_ref_clk_src"; qcom,iommu-hlos-group = "bcast_hlos"; qcom,iommu-hlos-partition = <0>; qcom,iommu-cpz-group = "bcast_cpz"; qcom,iommu-cpz-partition = <0>; }; }; &gdsc_venus { Loading
arch/arm/boot/dts/msm-iommu-v1.dtsi +4 −4 Original line number Diff line number Diff line Loading @@ -1278,7 +1278,7 @@ 0x0 0x0>; qcom,iommu-ctx@fc73c000 { bcast_cb0_hlos: qcom,iommu-ctx@fc73c000 { compatible = "qcom,msm-smmu-v1-ctx"; reg = <0xfc73c000 0x1000>; interrupts = <0 276 0>; Loading @@ -1289,7 +1289,7 @@ label = "bcast_cb0_hlos"; }; qcom,iommu-ctx@fc73d000 { bcast_cb1_cpz: qcom,iommu-ctx@fc73d000 { compatible = "qcom,msm-smmu-v1-ctx"; reg = <0xfc73d000 0x1000>; interrupts = <0 276 0>; Loading @@ -1300,7 +1300,7 @@ label = "bcast_cb1_cpz"; }; qcom,iommu-ctx@fc73e000 { bcast_cb2_demod: qcom,iommu-ctx@fc73e000 { compatible = "qcom,msm-smmu-v1-ctx"; reg = <0xfc73e000 0x1000>; interrupts = <0 276 0>; Loading @@ -1308,7 +1308,7 @@ label = "bcast_cb2_demod"; }; qcom,iommu-ctx@fc73f000 { bcast_cb3_apz: qcom,iommu-ctx@fc73f000 { compatible = "qcom,msm-smmu-v1-ctx"; reg = <0xfc73f000 0x1000>; interrupts = <0 276 0>; Loading