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Commit c8d94e7a authored by Linux Build Service Account's avatar Linux Build Service Account Committed by Gerrit - the friendly Code Review server
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Merge "qcom: soc: pil-mss: Add halt bases for modem pil"

parents 2f5f0bcd d63ef7f4

Documentation/devicetree/bindings/pil/pil-q6v5-mss.txt

+4 −1
Original line number Diff line number Diff line
@@ -11,7 +11,10 @@ Required properties: 
- reg:		      Pairs of physical base addresses and region sizes of

		      memory mapped registers.

- reg-names:	      Names of the bases for the above registers. "qdsp6_base",

		      "halt_base", "rmb_base", and "restart_reg" are expected.

		      "rmb_base", and "restart_reg" are expected.

		      If "halt_base" is in same 4K pages this register then

		      this will be defined else "halt_q6", "halt_modem",

		      "halt_nc" is required.

- interrupts:         The modem watchdog interrupt

- vdd_cx-supply:      Reference to the regulator that supplies the vdd_cx domain.

- vdd_mx-supply:      Reference to the regulator that supplies the memory rail.

drivers/soc/qcom/pil-msa.c

+7 −0
Original line number Diff line number Diff line
@@ -186,6 +186,13 @@ int pil_mss_shutdown(struct pil_desc *pil) 
			drv->axi_halt_base + MSS_NC_HALT_BASE);

	}



	if (drv->axi_halt_q6)

		pil_q6v5_halt_axi_port(pil, drv->axi_halt_q6);

	if (drv->axi_halt_mss)

		pil_q6v5_halt_axi_port(pil, drv->axi_halt_mss);

	if (drv->axi_halt_nc)

		pil_q6v5_halt_axi_port(pil, drv->axi_halt_nc);



	if (drv->restart_reg)

		writel_relaxed(1, drv->restart_reg);

drivers/soc/qcom/pil-q6v5.c

+49 −4
Original line number Diff line number Diff line
@@ -385,10 +385,55 @@ struct q6v5_data *pil_q6v5_init(struct platform_device *pdev) 
		return drv;



	res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "halt_base");

	if (res) {

		drv->axi_halt_base = devm_ioremap(&pdev->dev, res->start,

							resource_size(res));

	if (!drv->axi_halt_base)

		if (!drv->axi_halt_base) {

			dev_err(&pdev->dev, "Failed to map axi_halt_base.\n");

			return ERR_PTR(-ENOMEM);

		}

	}



	if (!drv->axi_halt_base) {

		res = platform_get_resource_byname(pdev, IORESOURCE_MEM,

								"halt_q6");

		if (res) {

			drv->axi_halt_q6 = devm_ioremap(&pdev->dev,

					res->start, resource_size(res));

			if (!drv->axi_halt_q6) {

				dev_err(&pdev->dev, "Failed to map axi_halt_q6.\n");

				return ERR_PTR(-ENOMEM);

			}

		}



		res = platform_get_resource_byname(pdev, IORESOURCE_MEM,

								"halt_modem");

		if (res) {

			drv->axi_halt_mss = devm_ioremap(&pdev->dev,

					res->start, resource_size(res));

			if (!drv->axi_halt_mss) {

				dev_err(&pdev->dev, "Failed to map axi_halt_mss.\n");

				return ERR_PTR(-ENOMEM);

			}

		}



		res = platform_get_resource_byname(pdev, IORESOURCE_MEM,

								"halt_nc");

		if (res) {

			drv->axi_halt_nc = devm_ioremap(&pdev->dev,

					res->start, resource_size(res));

			if (!drv->axi_halt_nc) {

				dev_err(&pdev->dev, "Failed to map axi_halt_nc.\n");

				return ERR_PTR(-ENOMEM);

			}

		}

	}



	if (!(drv->axi_halt_base || (drv->axi_halt_q6 && drv->axi_halt_mss

					&& drv->axi_halt_nc))) {

		dev_err(&pdev->dev, "halt bases for Q6 are not defined.\n");

		return ERR_PTR(-EINVAL);

	}



	drv->qdsp6v55 = of_device_is_compatible(pdev->dev.of_node,

						"qcom,pil-q6v55-mss");

drivers/soc/qcom/pil-q6v5.h

+5 −1
Original line number Diff line number Diff line
@@ -30,7 +30,11 @@ struct q6v5_data { 
	struct clk *core_clk;	   /* CPU core */

	struct clk *reg_clk;	   /* CPU access registers */

	struct clk *rom_clk;	   /* Boot ROM */

	void __iomem *axi_halt_base;

	void __iomem *axi_halt_base; /* Halt base of q6, mss,

					nc are in same 4K page */

	void __iomem *axi_halt_q6;

	void __iomem *axi_halt_mss;

	void __iomem *axi_halt_nc;

	void __iomem *restart_reg;

	struct regulator *vreg;

	struct regulator *vreg_cx;