Loading arch/arm/boot/dts/qcom/msm8994-pinctrl.dtsi +50 −0 Original line number Diff line number Diff line Loading @@ -1132,5 +1132,55 @@ bias-disable; /* NO PULL */ }; }; tsif0_signals { qcom,pins = <&gp 89>, /* TSIF0 CLK */ <&gp 90>, /* TSIF0 Enable */ <&gp 91>; /* TSIF0 DATA */ qcom,num-grp-pins = <3>; qcom,pins-func = <1>; label = "tsif0-signals"; tsif0_signals_active: tsif0_signals_active { drive_strength = <2>; /* 2 mA */ bias-pull-down; /* pull down */ }; }; /* sync signal is only used if configured to mode-2 */ tsif0_sync { qcom,pins = <&gp 110>; /* TSIF0 SYNC */ qcom,num-grp-pins = <1>; qcom,pins-func = <1>; label = "tsif0-sync"; tsif0_sync_active: tsif0_sync_active { drive_strength = <2>; /* 2 mA */ bias-pull-down; /* pull down */ }; }; tsif1_signals { qcom,pins = <&gp 93>, /* TSIF1 CLK */ <&gp 94>, /* TSIF1 Enable */ <&gp 95>; /* TSIF1 DATA */ qcom,num-grp-pins = <3>; qcom,pins-func = <1>; label = "tsif1-signals"; tsif1_signals_active: tsif1_signals_active { drive_strength = <2>; /* 2 mA */ bias-pull-down; /* pull down */ }; }; /* sync signal is only used if configured to mode-2 */ tsif1_sync { qcom,pins = <&gp 96>; /* TSIF1 SYNC */ qcom,num-grp-pins = <1>; qcom,pins-func = <1>; label = "tsif1-sync"; tsif1_sync_active: tsif1_sync_active { drive_strength = <2>; /* 2 mA */ bias-pull-down; /* pull down */ }; }; }; }; arch/arm/boot/dts/qcom/msm8994.dtsi +48 −0 Original line number Diff line number Diff line Loading @@ -1034,6 +1034,54 @@ interrupt-names = "cdc-int"; }; tspp: msm_tspp@f99d8000 { compatible = "qcom,msm_tspp"; reg = <0xf99d8000 0x1000>, /* MSM_TSIF0_PHYS */ <0xf99d9000 0x1000>, /* MSM_TSIF1_PHYS */ <0xf99da000 0x1000>, /* MSM_TSPP_PHYS */ <0xf99c4000 0x11000>; /* MSM_TSPP_BAM_PHYS */ reg-names = "MSM_TSIF0_PHYS", "MSM_TSIF1_PHYS", "MSM_TSPP_PHYS", "MSM_TSPP_BAM_PHYS"; interrupts = <0 121 0>, /* TSIF_TSPP_IRQ */ <0 119 0>, /* TSIF0_IRQ */ <0 120 0>, /* TSIF1_IRQ */ <0 122 0>; /* TSIF_BAM_IRQ */ interrupt-names = "TSIF_TSPP_IRQ", "TSIF0_IRQ", "TSIF1_IRQ", "TSIF_BAM_IRQ"; qcom,tsif-pclk = "iface_clk"; qcom,tsif-ref-clk = "ref_clk"; qcom,msm-bus,name = "tsif"; qcom,msm-bus,num-cases = <2>; qcom,msm-bus,num-paths = <1>; qcom,msm-bus,vectors-KBps = <82 512 0 0>, /* No vote */ <82 512 12288 24576>; /* Max. bandwidth, 2xTSIF, each max of 96Mbps */ pinctrl-names = "disabled", "tsif0-mode1", "tsif0-mode2", "tsif1-mode1", "tsif1-mode2", "dual-tsif-mode1", "dual-tsif-mode2"; pinctrl-0 = <>; /* disabled */ pinctrl-1 = <&tsif0_signals_active>; /* tsif0-mode1 */ pinctrl-2 = <&tsif0_signals_active &tsif0_sync_active>; /* tsif0-mode2 */ pinctrl-3 = <&tsif1_signals_active>; /* tsif1-mode1 */ pinctrl-4 = <&tsif1_signals_active &tsif1_sync_active>; /* tsif1-mode2 */ pinctrl-5 = <&tsif0_signals_active &tsif1_signals_active>; /* dual-tsif-mode1 */ pinctrl-6 = <&tsif0_signals_active &tsif0_sync_active &tsif1_signals_active &tsif1_sync_active>; /* dual-tsif-mode2 */ }; slim_msm: slim@fe12f000 { cell-index = <1>; compatible = "qcom,slim-ngd"; Loading Loading
arch/arm/boot/dts/qcom/msm8994-pinctrl.dtsi +50 −0 Original line number Diff line number Diff line Loading @@ -1132,5 +1132,55 @@ bias-disable; /* NO PULL */ }; }; tsif0_signals { qcom,pins = <&gp 89>, /* TSIF0 CLK */ <&gp 90>, /* TSIF0 Enable */ <&gp 91>; /* TSIF0 DATA */ qcom,num-grp-pins = <3>; qcom,pins-func = <1>; label = "tsif0-signals"; tsif0_signals_active: tsif0_signals_active { drive_strength = <2>; /* 2 mA */ bias-pull-down; /* pull down */ }; }; /* sync signal is only used if configured to mode-2 */ tsif0_sync { qcom,pins = <&gp 110>; /* TSIF0 SYNC */ qcom,num-grp-pins = <1>; qcom,pins-func = <1>; label = "tsif0-sync"; tsif0_sync_active: tsif0_sync_active { drive_strength = <2>; /* 2 mA */ bias-pull-down; /* pull down */ }; }; tsif1_signals { qcom,pins = <&gp 93>, /* TSIF1 CLK */ <&gp 94>, /* TSIF1 Enable */ <&gp 95>; /* TSIF1 DATA */ qcom,num-grp-pins = <3>; qcom,pins-func = <1>; label = "tsif1-signals"; tsif1_signals_active: tsif1_signals_active { drive_strength = <2>; /* 2 mA */ bias-pull-down; /* pull down */ }; }; /* sync signal is only used if configured to mode-2 */ tsif1_sync { qcom,pins = <&gp 96>; /* TSIF1 SYNC */ qcom,num-grp-pins = <1>; qcom,pins-func = <1>; label = "tsif1-sync"; tsif1_sync_active: tsif1_sync_active { drive_strength = <2>; /* 2 mA */ bias-pull-down; /* pull down */ }; }; }; };
arch/arm/boot/dts/qcom/msm8994.dtsi +48 −0 Original line number Diff line number Diff line Loading @@ -1034,6 +1034,54 @@ interrupt-names = "cdc-int"; }; tspp: msm_tspp@f99d8000 { compatible = "qcom,msm_tspp"; reg = <0xf99d8000 0x1000>, /* MSM_TSIF0_PHYS */ <0xf99d9000 0x1000>, /* MSM_TSIF1_PHYS */ <0xf99da000 0x1000>, /* MSM_TSPP_PHYS */ <0xf99c4000 0x11000>; /* MSM_TSPP_BAM_PHYS */ reg-names = "MSM_TSIF0_PHYS", "MSM_TSIF1_PHYS", "MSM_TSPP_PHYS", "MSM_TSPP_BAM_PHYS"; interrupts = <0 121 0>, /* TSIF_TSPP_IRQ */ <0 119 0>, /* TSIF0_IRQ */ <0 120 0>, /* TSIF1_IRQ */ <0 122 0>; /* TSIF_BAM_IRQ */ interrupt-names = "TSIF_TSPP_IRQ", "TSIF0_IRQ", "TSIF1_IRQ", "TSIF_BAM_IRQ"; qcom,tsif-pclk = "iface_clk"; qcom,tsif-ref-clk = "ref_clk"; qcom,msm-bus,name = "tsif"; qcom,msm-bus,num-cases = <2>; qcom,msm-bus,num-paths = <1>; qcom,msm-bus,vectors-KBps = <82 512 0 0>, /* No vote */ <82 512 12288 24576>; /* Max. bandwidth, 2xTSIF, each max of 96Mbps */ pinctrl-names = "disabled", "tsif0-mode1", "tsif0-mode2", "tsif1-mode1", "tsif1-mode2", "dual-tsif-mode1", "dual-tsif-mode2"; pinctrl-0 = <>; /* disabled */ pinctrl-1 = <&tsif0_signals_active>; /* tsif0-mode1 */ pinctrl-2 = <&tsif0_signals_active &tsif0_sync_active>; /* tsif0-mode2 */ pinctrl-3 = <&tsif1_signals_active>; /* tsif1-mode1 */ pinctrl-4 = <&tsif1_signals_active &tsif1_sync_active>; /* tsif1-mode2 */ pinctrl-5 = <&tsif0_signals_active &tsif1_signals_active>; /* dual-tsif-mode1 */ pinctrl-6 = <&tsif0_signals_active &tsif0_sync_active &tsif1_signals_active &tsif1_sync_active>; /* dual-tsif-mode2 */ }; slim_msm: slim@fe12f000 { cell-index = <1>; compatible = "qcom,slim-ngd"; Loading