Merge "msm: mdss: send panic/roburst signal to bimc based on fill level" (c7797708) · Commits · e / devices / android_kernel_sony_msm8994

Documentation/devicetree/bindings/fb/mdss-mdp.txt

+22 −0

Original line number	Diff line number	Diff line
		@@ -347,6 +347,23 @@ Fudge Factors: Fudge factors are used to boost demand for
		command mode panels.
		- qcom,max-bandwidth-per-pipe-kbps: This value indicates the max bandwidth in KB
		that a single pipe can support without underflow.
		- qcom,mdss-has-panic-ctrl: Boolean property to indicate if panic/robust signal
		control feature is available or not.
		- qcom,mdss-pipe-vig-panic-ctrl-offsets: Array of panic/robust signal offsets
		corresponding to the respective VIG pipes.
		Number of signal offsets should match the
		number of offsets defined in property:
		qcom,mdss-pipe-vig-off
		- qcom,mdss-pipe-rgb-panic-ctrl-offsets: Array of panic/robust signal offsets
		corresponding to the respective RGB pipes.
		Number of signal offsets should match the
		number of offsets defined in property:
		qcom,mdss-pipe-rgb-off
		- qcom,mdss-pipe-dma-panic-ctrl-offsets: Array of panic/robust signal offsets
		corresponding to the respective DMA pipes.
		Number of signal offsets should match the
		number of offsets defined in property:
		qcom,mdss-pipe-dma-off

		Optional subnodes:
		Child nodes representing the frame buffer virtual devices.
		@@ -472,6 +489,11 @@ Example:
		qcom,mdss-pipe-dma-clk-ctrl-offsets = <0x3AC 8 12>,
		<0x3B4 8 12>;

		qcom,mdss-has-panic-ctrl;
		qcom,mdss-pipe-vig-panic-ctrl-offsets = <0 1 2 3>;
		qcom,mdss-pipe-rgb-panic-ctrl-offsets = <4 5 6 7>;
		qcom,mdss-pipe-dma-panic-ctrl-offsets = <8 9>;

		qcom,mdss-pipe-sw-reset-off = <0x0128>;
		qcom,mdss-pipe-vig-sw-reset-map = <5 6 7 8>;
		qcom,mdss-pipe-rgb-sw-reset-map = <9 10 11 12>;

drivers/video/msm/mdss/mdss.h

+1 −0

Original line number	Diff line number	Diff line
		@@ -122,6 +122,7 @@ struct mdss_data_type {
		u32 irq_buzy;
		u32 has_bwc;
		u32 has_decimation;
		bool has_panic_ctrl;
		u32 wfd_mode;
		u32 has_no_lut_read;
		u8 has_wb_ad;

drivers/video/msm/mdss/mdss_mdp.c

+54 −0

Original line number	Diff line number	Diff line
		@@ -1726,6 +1726,46 @@ static int mdss_mdp_parse_dt_pipe_clk_ctrl(struct platform_device *pdev,
		return rc;
		}

		static void mdss_mdp_parse_dt_pipe_panic_ctrl(struct platform_device *pdev,
		char prop_name, struct mdss_mdp_pipe pipe_list, u32 npipes)
		{
		int rc = 0;
		int i, j;
		size_t len;
		const u32 *arr;
		struct mdss_mdp_pipe *pipe = NULL;
		struct mdss_data_type *mdata = platform_get_drvdata(pdev);

		arr = of_get_property(pdev->dev.of_node, prop_name, (int *) &len);
		if (arr) {
		len /= sizeof(u32);
		for (i = 0, j = 0; i < len; j++) {
		if (j >= npipes) {
		pr_err("invalid panic ctrl enries for prop: %s\n",
		prop_name);
		goto error;
		}

		pipe = &pipe_list[j];
		pipe->panic_ctrl_ndx = be32_to_cpu(arr[i++]);
		}
		if (j != npipes) {
		pr_err("%s: %d entries found. required %d\n",
		prop_name, j, npipes);
		rc = -EINVAL;
		goto error;
		}
		} else {
		pr_debug("panic ctrl enabled but property '%s' not found\n",
		prop_name);
		rc = -EINVAL;
		}

		error:
		if (rc)
		mdata->has_panic_ctrl = false;
		}

		static int mdss_mdp_parse_dt_pipe(struct platform_device *pdev)
		{
		u32 npipes, dma_off;
		@@ -1954,6 +1994,20 @@ static int mdss_mdp_parse_dt_pipe(struct platform_device *pdev)
		mdata->ndma_pipes);
		}

		mdata->has_panic_ctrl = of_property_read_bool(pdev->dev.of_node,
		"qcom,mdss-has-panic-ctrl");
		if (mdata->has_panic_ctrl) {
		mdss_mdp_parse_dt_pipe_panic_ctrl(pdev,
		"qcom,mdss-pipe-vig-panic-ctrl-offsets",
		mdata->vig_pipes, mdata->nvig_pipes);
		mdss_mdp_parse_dt_pipe_panic_ctrl(pdev,
		"qcom,mdss-pipe-rgb-panic-ctrl-offsets",
		mdata->rgb_pipes, mdata->nrgb_pipes);
		mdss_mdp_parse_dt_pipe_panic_ctrl(pdev,
		"qcom,mdss-pipe-dma-panic-ctrl-offsets",
		mdata->dma_pipes, mdata->ndma_pipes);
		}

		goto parse_done;

		parse_fail:

drivers/video/msm/mdss/mdss_mdp.h

+10 −0

Original line number	Diff line number	Diff line
		@@ -367,6 +367,7 @@ struct mdss_mdp_pipe {
		char __iomem *base;
		u32 ftch_id;
		u32 xin_id;
		u32 panic_ctrl_ndx;
		struct mdss_mdp_shared_reg_ctrl clk_ctrl;
		struct mdss_mdp_shared_reg_ctrl clk_status;
		struct mdss_mdp_shared_reg_ctrl sw_reset;
		@@ -553,6 +554,14 @@ static inline int mdss_mdp_line_buffer_width(void)
		return MAX_LINE_BUFFER_WIDTH;
		}

		static inline int mdss_mdp_panic_signal_supported(
		struct mdss_data_type mdata, struct mdss_mdp_pipe pipe)
		{
		return (IS_MDSS_MAJOR_MINOR_SAME(mdata->mdp_rev, MDSS_MDP_HW_REV_105) &&
		pipe->mixer_left &&
		pipe->mixer_left->type == MDSS_MDP_MIXER_TYPE_INTF);
		}

		irqreturn_t mdss_mdp_isr(int irq, void *ptr);
		int mdss_iommu_attach(struct mdss_data_type *mdata);
		int mdss_iommu_dettach(struct mdss_data_type *mdata);
		@@ -725,6 +734,7 @@ int mdss_mdp_ctl_addr_setup(struct mdss_data_type mdata, u32 ctl_offsets,
		u32 *wb_offsets, u32 len);

		int mdss_mdp_pipe_fetch_halt(struct mdss_mdp_pipe *pipe);
		int mdss_mdp_pipe_panic_signal_ctrl(struct mdss_mdp_pipe *pipe, bool enable);
		int mdss_mdp_pipe_destroy(struct mdss_mdp_pipe *pipe);
		int mdss_mdp_pipe_queue_data(struct mdss_mdp_pipe *pipe,
		struct mdss_mdp_data *src_data);

drivers/video/msm/mdss/mdss_mdp_hwio.h

+2 −0

Original line number	Diff line number	Diff line
		@@ -42,6 +42,8 @@
		#define MDSS_MDP_REG_HIST_INTR_CLEAR 0x00024
		#define MMSS_MDP_MDP_SSPP_SPARE_0 0x00028

		#define MMSS_MDP_PANIC_ROBUST_CTRL 0x00178

		#define MDSS_MDP_REG_VIDEO_INTF_UNDERFLOW_CTL 0x002E0
		#define MDSS_MDP_REG_SPLIT_DISPLAY_EN 0x002F4
		#define MDSS_MDP_REG_SPLIT_DISPLAY_UPPER_PIPE_CTRL 0x002F8