Merge "msm: ipa: driver upgrade for new IPAv2.5 core" (c757aa81) · Commits · e / devices / android_kernel_sony_msm8994

drivers/platform/msm/ipa/ipa.c

+22 −9

Original line number	Diff line number	Diff line
		@@ -951,7 +951,8 @@ static int ipa_setup_exception_path(void)
		IPA_RESOURCE_NAME_MAX);
		/* set template for the A5_MUX hdr in header addition block */
		hdr_entry->hdr_len = IPA_A5_MUX_HEADER_LENGTH;
		} else if (ipa_ctx->ipa_hw_type == IPA_HW_v2_0) {
		} else if (ipa_ctx->ipa_hw_type == IPA_HW_v2_0 \|\|
		ipa_ctx->ipa_hw_type == IPA_HW_v2_5) {
		strlcpy(hdr_entry->name, IPA_LAN_RX_HDR_NAME,
		IPA_RESOURCE_NAME_MAX);
		hdr_entry->hdr_len = IPA_LAN_RX_HEADER_LENGTH;
		@@ -1417,9 +1418,16 @@ static int ipa_init_sram(void)
		struct ipa_mem_buffer mem;
		int rc = 0;

		phys_addr = ipa_ctx->ipa_wrapper_base + IPA_REG_BASE_OFST +
		if (ipa_ctx->ipa_hw_type == IPA_HW_v2_5) {
		phys_addr = ipa_ctx->ipa_wrapper_base +
		ipa_ctx->ctrl->ipa_reg_base_ofst +
		IPA_SRAM_SW_FIRST_v2_5;
		} else {
		phys_addr = ipa_ctx->ipa_wrapper_base +
		ipa_ctx->ctrl->ipa_reg_base_ofst +
		IPA_SRAM_DIRECT_ACCESS_N_OFST_v2_0(
		ipa_ctx->smem_restricted_bytes / 4);
		}
		ipa_sram_mmio = ioremap(phys_addr,
		ipa_ctx->smem_sz - ipa_ctx->smem_restricted_bytes);
		if (!ipa_sram_mmio) {
		@@ -1720,7 +1728,8 @@ static int ipa_setup_apps_pipes(void)
		}
		IPADBG("Apps to IPA cmd pipe is connected\n");

		if (ipa_ctx->ipa_hw_type == IPA_HW_v2_0) {
		if (ipa_ctx->ipa_hw_type == IPA_HW_v2_0 \|\|
		ipa_ctx->ipa_hw_type == IPA_HW_v2_5) {
		ipa_init_sram();
		ipa_init_hdr();
		ipa_init_rt4();
		@@ -1750,7 +1759,8 @@ static int ipa_setup_apps_pipes(void)
		if (ipa_ctx->ipa_hw_type == IPA_HW_v1_1) {
		sys_in.ipa_ep_cfg.hdr.hdr_a5_mux = 1;
		sys_in.ipa_ep_cfg.hdr.hdr_len = IPA_A5_MUX_HEADER_LENGTH;
		} else if (ipa_ctx->ipa_hw_type == IPA_HW_v2_0) {
		} else if (ipa_ctx->ipa_hw_type == IPA_HW_v2_0 \|\|
		ipa_ctx->ipa_hw_type == IPA_HW_v2_5) {
		sys_in.notify = ipa_lan_rx_cb;
		sys_in.priv = NULL;
		sys_in.ipa_ep_cfg.hdr.hdr_len = IPA_LAN_RX_HEADER_LENGTH;
		@@ -1958,7 +1968,8 @@ static int ipa_get_clks(struct device *dev)
		return -ENODEV;
		}

		if (ipa_ctx->ipa_hw_type != IPA_HW_v2_0) {
		if (ipa_ctx->ipa_hw_type != IPA_HW_v2_0 &&
		ipa_ctx->ipa_hw_type != IPA_HW_v2_5) {
		ipa_cnoc_clk = clk_get(dev, "iface_clk");
		if (IS_ERR(ipa_cnoc_clk)) {
		ipa_cnoc_clk = NULL;
		@@ -2247,6 +2258,7 @@ static int ipa_setup_bam_cfg(const struct ipa_plat_drv_res *res)
		reg_val = IPA_BAM_CNFG_BITS_VALv1_1;
		break;
		case IPA_HW_v2_0:
		case IPA_HW_v2_5:
		reg_val = IPA_BAM_CNFG_BITS_VALv2_0;
		break;
		default:
		@@ -2554,7 +2566,8 @@ static int ipa_init(const struct ipa_plat_drv_res *resource_p,
		ipa_enable_clks();

		/* setup IPA register access */
		ipa_ctx->mmio = ioremap(resource_p->ipa_mem_base + IPA_REG_BASE_OFST,
		ipa_ctx->mmio = ioremap(resource_p->ipa_mem_base +
		ipa_ctx->ctrl->ipa_reg_base_ofst,
		resource_p->ipa_mem_size);
		if (!ipa_ctx->mmio) {
		IPAERR(":ipa-base ioremap err.\n");

drivers/platform/msm/ipa/ipa_client.c

+21 −10

Original line number	Diff line number	Diff line
		@@ -528,9 +528,17 @@ int ipa_wdi_init(void)

		mutex_init(&ipa_ctx->wdi.lock);

		phys_addr = ipa_ctx->ipa_wrapper_base + IPA_REG_BASE_OFST +
		if (ipa_ctx->ipa_hw_type == IPA_HW_v2_5) {
		phys_addr = ipa_ctx->ipa_wrapper_base +
		ipa_ctx->ctrl->ipa_reg_base_ofst +
		IPA_SRAM_SW_FIRST_v2_5;
		} else {
		phys_addr = ipa_ctx->ipa_wrapper_base +
		ipa_ctx->ctrl->ipa_reg_base_ofst +
		IPA_SRAM_DIRECT_ACCESS_N_OFST_v2_0(
		ipa_ctx->smem_restricted_bytes / 4);
		}

		ipa_ctx->wdi.ipa_sram_mmio = ioremap(phys_addr, IPA_RAM_WDI_SMEM_SIZE);
		if (!ipa_ctx->wdi.ipa_sram_mmio) {
		IPAERR("fail to ioremap IPA SRAM\n");
		@@ -1264,8 +1272,9 @@ int ipa_enable_data_path(u32 clnt_hdl)
		if (ipa_ctx->ipa_hw_mode == IPA_HW_MODE_VIRTUAL)
		return 0;

		/* On IPA 2.0, disable HOLB */
		if (ipa_ctx->ipa_hw_type == IPA_HW_v2_0 &&
		/* From IPA 2.0, disable HOLB */
		if ((ipa_ctx->ipa_hw_type == IPA_HW_v2_0 \|\|
		ipa_ctx->ipa_hw_type == IPA_HW_v2_5) &&
		IPA_CLIENT_IS_CONS(ep->client)) {
		memset(&holb_cfg, 0 , sizeof(holb_cfg));
		holb_cfg.en = IPA_HOLB_TMR_DIS;
		@@ -1301,7 +1310,8 @@ int ipa_disable_data_path(u32 clnt_hdl)
		return 0;

		/* On IPA 2.0, enable HOLB in order to prevent IPA from stalling */
		if (ipa_ctx->ipa_hw_type == IPA_HW_v2_0 &&
		if ((ipa_ctx->ipa_hw_type == IPA_HW_v2_0 \|\|
		ipa_ctx->ipa_hw_type == IPA_HW_v2_5) &&
		IPA_CLIENT_IS_CONS(ep->client)) {
		memset(&holb_cfg, 0, sizeof(holb_cfg));
		holb_cfg.en = IPA_HOLB_TMR_EN;
		@@ -1519,7 +1529,8 @@ int ipa_connect(const struct ipa_connect_params in, struct ipa_sps_params sps,
		IPADBG("Data FIFO pa=%pa, size=%d\n", &ep->connect.data.phys_base,
		ep->connect.data.size);

		if (ipa_ctx->ipa_hw_type == IPA_HW_v2_0 &&
		if ((ipa_ctx->ipa_hw_type == IPA_HW_v2_0 \|\|
		ipa_ctx->ipa_hw_type == IPA_HW_v2_5) &&
		IPA_CLIENT_IS_USB_CONS(in->client))
		ep->connect.event_thresh = IPA_USB_EVENT_THRESHOLD;
		else

drivers/platform/msm/ipa/ipa_debugfs.c

+2 −1

Original line number	Diff line number	Diff line
		@@ -713,7 +713,8 @@ static ssize_t ipa_read_stats(struct file file, char __user ubuf,
		for (i = 0; i < IPA_NUM_PIPES; i++)
		connect \|= (ipa_ctx->ep[i].valid << i);

		if (ipa_ctx->ipa_hw_type == IPA_HW_v2_0) {
		if (ipa_ctx->ipa_hw_type == IPA_HW_v2_0 \|\|
		ipa_ctx->ipa_hw_type == IPA_HW_v2_5) {
		nbytes = scnprintf(dbg_buff, IPA_MAX_MSG_LEN,
		"sw_tx=%u\n"
		"hw_tx=%u\n"

drivers/platform/msm/ipa/ipa_dp.c

+2 −1

Original line number	Diff line number	Diff line
		@@ -2272,7 +2272,8 @@ static int ipa_assign_policy(struct ipa_sys_connect_params *in,
		WARN_ON(1);
		return -EINVAL;
		}
		} else if (ipa_ctx->ipa_hw_type == IPA_HW_v2_0) {
		} else if (ipa_ctx->ipa_hw_type == IPA_HW_v2_0 \|\|
		ipa_ctx->ipa_hw_type == IPA_HW_v2_5) {
		sys->ep->status.status_en = true;
		if (IPA_CLIENT_IS_PROD(in->client)) {
		if (!sys->ep->skip_ep_cfg) {

drivers/platform/msm/ipa/ipa_i.h

+6 −1

Original line number	Diff line number	Diff line
		@@ -596,12 +596,15 @@ struct ipa_nat_mem {
		* @IPA_HW_v1_0: IPA hardware version 1.0, corresponding to ELAN 1.0
		* @IPA_HW_v1_1: IPA hardware version 1.1, corresponding to ELAN 2.0
		* @IPA_HW_v2_0: IPA hardware version 2.0
		* @IPA_HW_v2_5: IPA hardware version 2.5
		*/
		enum ipa_hw_type {
		IPA_HW_None = 0,
		IPA_HW_v1_0 = 1,
		IPA_HW_v1_1 = 2,
		IPA_HW_v2_0 = 3
		IPA_HW_v2_0 = 3,
		IPA_HW_v2_1 = 4,
		IPA_HW_v2_5 = 5
		};

		/**
		@@ -841,6 +844,8 @@ struct ipa_controller {
		u32 ipa_clk_rate_hi;
		u32 ipa_clk_rate_lo;
		u32 clock_scaling_bw_threshold;
		u32 ipa_reg_base_ofst;
		u32 max_holb_tmr_val;
		void (*ipa_sram_read_settings)(void);
		void (*ipa_cfg_ep_hdr)(u32 pipe_number,
		const struct ipa_ep_cfg_hdr *ipa_ep_hdr_cfg);