Loading arch/arm/boot/dts/qcom/msm8939-common.dtsi +8 −5 Original line number Diff line number Diff line Loading @@ -1598,12 +1598,9 @@ }; &gdsc_venus { clock-names = "bus_clk", "core_clk", "core0_clk", "core1_clk"; clock-names = "bus_clk", "core_clk"; clocks = <&clock_gcc clk_gcc_venus0_axi_clk>, <&clock_gcc clk_gcc_venus0_vcodec0_clk>, <&clock_gcc clk_gcc_venus0_core0_vcodec0_clk>, <&clock_gcc clk_gcc_venus0_core1_vcodec0_clk>; <&clock_gcc clk_gcc_venus0_vcodec0_clk>; status = "okay"; }; Loading Loading @@ -1642,10 +1639,16 @@ }; &gdsc_venus_core0 { qcom,support-hw-trigger; clock-names ="core0_clk"; clocks = <&clock_gcc clk_gcc_venus0_core0_vcodec0_clk>; status = "okay"; }; &gdsc_venus_core1 { qcom,support-hw-trigger; clock-names ="core1_clk"; clocks = <&clock_gcc clk_gcc_venus0_core1_vcodec0_clk>; status = "okay"; }; Loading Loading
arch/arm/boot/dts/qcom/msm8939-common.dtsi +8 −5 Original line number Diff line number Diff line Loading @@ -1598,12 +1598,9 @@ }; &gdsc_venus { clock-names = "bus_clk", "core_clk", "core0_clk", "core1_clk"; clock-names = "bus_clk", "core_clk"; clocks = <&clock_gcc clk_gcc_venus0_axi_clk>, <&clock_gcc clk_gcc_venus0_vcodec0_clk>, <&clock_gcc clk_gcc_venus0_core0_vcodec0_clk>, <&clock_gcc clk_gcc_venus0_core1_vcodec0_clk>; <&clock_gcc clk_gcc_venus0_vcodec0_clk>; status = "okay"; }; Loading Loading @@ -1642,10 +1639,16 @@ }; &gdsc_venus_core0 { qcom,support-hw-trigger; clock-names ="core0_clk"; clocks = <&clock_gcc clk_gcc_venus0_core0_vcodec0_clk>; status = "okay"; }; &gdsc_venus_core1 { qcom,support-hw-trigger; clock-names ="core1_clk"; clocks = <&clock_gcc clk_gcc_venus0_core1_vcodec0_clk>; status = "okay"; }; Loading