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Commit c6d82b05 authored by Vikram Mulukutla's avatar Vikram Mulukutla
Browse files

clk: qcom: clock-cpu-8994: Update a57_pll1 with V2 settings 



Previously, lock detection failures were observed consistently
on A57 PLL1 when the MSM8994V2 PLL settings were applied.
However, these failures have now been observed on all other
CPU PLLs as well, and a workaround has been implemented.

Therefore, use the V2 settings for A57 PLL1 as well.

Change-Id: I10d6c0cb11de3c654ba3b1520767b8cbb8d1e0ec
Signed-off-by: default avatarVikram Mulukutla <markivx@codeaurora.org>
parent a19c6663

drivers/clk/qcom/clock-cpu-8994.c

+4 −0
Original line number Diff line number Diff line
@@ -1437,15 +1437,19 @@ static void init_v2_data(void) 
	a53_pll0.vals.test_ctl_hi_val = 0x1;

	a53_pll1.vals.test_ctl_hi_val = 0x1;

	a57_pll0.vals.test_ctl_hi_val = 0x1;

	a57_pll1.vals.test_ctl_hi_val = 0x1;

	a53_pll0.vals.test_ctl_lo_val = 0x80000000;

	a53_pll1.vals.test_ctl_lo_val = 0x80000000;

	a57_pll0.vals.test_ctl_lo_val = 0x80000000;

	a57_pll1.vals.test_ctl_lo_val = 0x80000000;

	a53_pll0.init_test_ctl = true;

	a53_pll1.init_test_ctl = true;

	a57_pll0.init_test_ctl = true;

	a57_pll1.init_test_ctl = true;

	a53_pll0.pgm_test_ctl_enable = false;

	a53_pll1.pgm_test_ctl_enable = false;

	a57_pll0.pgm_test_ctl_enable = false;

	a57_pll1.pgm_test_ctl_enable = false;

	a57_clk.c.parent = &a57_hf_mux_v2.c;

	a53_clk.c.parent = &a53_hf_mux_v2.c;

	a53_div_clk.data.min_div = 8;