Loading arch/arm/boot/dts/qti/mpq8092-iommu.dtsi +3 −3 Original line number Diff line number Diff line Loading @@ -201,11 +201,11 @@ 0x1555>; venus_ns: qti,iommu-ctx@fdc8c000 { qti,iommu-ctx-sids = <0 1 2 3 4 5 7>; qti,iommu-ctx-sids = <0 1 2 3 4 5 7 8 9 10 11>; }; venus_sec_bitstream: qti,iommu-ctx@fdc8d000 { qti,iommu-ctx-sids = <0x80 0x81 0x82 0x83 0x84>; qti,iommu-ctx-sids = <0x80 0x81 0x82 0x83 0x84 0x88 0x8a>; label = "venus_sec_bitstream"; }; Loading @@ -222,7 +222,7 @@ compatible = "qti,msm-smmu-v1-ctx"; reg = <0xfdc90000 0x1000>; interrupts = <0 42 0>; qti,iommu-ctx-sids = <0x87 0xA0>; qti,iommu-ctx-sids = <0x87 0x89 0x8b 0xa0>; label = "venus_sec_non_pixel"; qti,secure-context; }; Loading Loading
arch/arm/boot/dts/qti/mpq8092-iommu.dtsi +3 −3 Original line number Diff line number Diff line Loading @@ -201,11 +201,11 @@ 0x1555>; venus_ns: qti,iommu-ctx@fdc8c000 { qti,iommu-ctx-sids = <0 1 2 3 4 5 7>; qti,iommu-ctx-sids = <0 1 2 3 4 5 7 8 9 10 11>; }; venus_sec_bitstream: qti,iommu-ctx@fdc8d000 { qti,iommu-ctx-sids = <0x80 0x81 0x82 0x83 0x84>; qti,iommu-ctx-sids = <0x80 0x81 0x82 0x83 0x84 0x88 0x8a>; label = "venus_sec_bitstream"; }; Loading @@ -222,7 +222,7 @@ compatible = "qti,msm-smmu-v1-ctx"; reg = <0xfdc90000 0x1000>; interrupts = <0 42 0>; qti,iommu-ctx-sids = <0x87 0xA0>; qti,iommu-ctx-sids = <0x87 0x89 0x8b 0xa0>; label = "venus_sec_non_pixel"; qti,secure-context; }; Loading