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ARM: dts: msm: add CPR support for A57 1.7664 GHz speed bin for msm8994v2
Add VDD_APC1 CPR support for speed bin fuse values 0 and 1.
Speed bin 0 corresponds to the existing chips with a maximum A57
frequency of 1.9584 GHz. Speed bin 1 corresponds to a new set of
chips with a maximum A57 frequency of 1.7664 GHz.
Change-Id: Ie50e8272378045cb8515b20e76fbc8a4101faf3a
Signed-off-by:
David Collins <collinsd@codeaurora.org>