Loading drivers/mmc/core/mmc.c +4 −6 Original line number Diff line number Diff line Loading @@ -763,9 +763,7 @@ static int mmc_select_powerclass(struct mmc_card *card, EXT_CSD_PWR_CL_52_195 : EXT_CSD_PWR_CL_DDR_52_195; else if (host->ios.clock <= 200000000) index = (bus_width <= EXT_CSD_BUS_WIDTH_8) ? EXT_CSD_PWR_CL_200_195 : EXT_CSD_PWR_CL_DDR_200_195; index = EXT_CSD_PWR_CL_200_195; break; case MMC_VDD_27_28: case MMC_VDD_28_29: Loading @@ -783,9 +781,9 @@ static int mmc_select_powerclass(struct mmc_card *card, EXT_CSD_PWR_CL_52_360 : EXT_CSD_PWR_CL_DDR_52_360; else if (host->ios.clock <= 200000000) index = (bus_width <= EXT_CSD_BUS_WIDTH_8) ? EXT_CSD_PWR_CL_200_360 : EXT_CSD_PWR_CL_DDR_200_360; index = (bus_width == EXT_CSD_DDR_BUS_WIDTH_8) ? EXT_CSD_PWR_CL_DDR_200_360 : EXT_CSD_PWR_CL_200_360; break; default: pr_warning("%s: Voltage range not supported " Loading include/linux/mmc/mmc.h +1 −2 Original line number Diff line number Diff line Loading @@ -270,8 +270,7 @@ struct _mmc_csd { #define EXT_CSD_POWER_OFF_LONG_TIME 247 /* RO */ #define EXT_CSD_GENERIC_CMD6_TIME 248 /* RO */ #define EXT_CSD_CACHE_SIZE 249 /* RO, 4 bytes */ #define EXT_CSD_PWR_CL_DDR_200_195 253 /* RO */ #define EXT_CSD_PWR_CL_DDR_200_360 254 /* RO */ #define EXT_CSD_PWR_CL_DDR_200_360 253 /* RO */ #define EXT_CSD_TAG_UNIT_SIZE 498 /* RO */ #define EXT_CSD_DATA_TAG_SUPPORT 499 /* RO */ #define EXT_CSD_MAX_PACKED_WRITES 500 /* RO */ Loading Loading
drivers/mmc/core/mmc.c +4 −6 Original line number Diff line number Diff line Loading @@ -763,9 +763,7 @@ static int mmc_select_powerclass(struct mmc_card *card, EXT_CSD_PWR_CL_52_195 : EXT_CSD_PWR_CL_DDR_52_195; else if (host->ios.clock <= 200000000) index = (bus_width <= EXT_CSD_BUS_WIDTH_8) ? EXT_CSD_PWR_CL_200_195 : EXT_CSD_PWR_CL_DDR_200_195; index = EXT_CSD_PWR_CL_200_195; break; case MMC_VDD_27_28: case MMC_VDD_28_29: Loading @@ -783,9 +781,9 @@ static int mmc_select_powerclass(struct mmc_card *card, EXT_CSD_PWR_CL_52_360 : EXT_CSD_PWR_CL_DDR_52_360; else if (host->ios.clock <= 200000000) index = (bus_width <= EXT_CSD_BUS_WIDTH_8) ? EXT_CSD_PWR_CL_200_360 : EXT_CSD_PWR_CL_DDR_200_360; index = (bus_width == EXT_CSD_DDR_BUS_WIDTH_8) ? EXT_CSD_PWR_CL_DDR_200_360 : EXT_CSD_PWR_CL_200_360; break; default: pr_warning("%s: Voltage range not supported " Loading
include/linux/mmc/mmc.h +1 −2 Original line number Diff line number Diff line Loading @@ -270,8 +270,7 @@ struct _mmc_csd { #define EXT_CSD_POWER_OFF_LONG_TIME 247 /* RO */ #define EXT_CSD_GENERIC_CMD6_TIME 248 /* RO */ #define EXT_CSD_CACHE_SIZE 249 /* RO, 4 bytes */ #define EXT_CSD_PWR_CL_DDR_200_195 253 /* RO */ #define EXT_CSD_PWR_CL_DDR_200_360 254 /* RO */ #define EXT_CSD_PWR_CL_DDR_200_360 253 /* RO */ #define EXT_CSD_TAG_UNIT_SIZE 498 /* RO */ #define EXT_CSD_DATA_TAG_SUPPORT 499 /* RO */ #define EXT_CSD_MAX_PACKED_WRITES 500 /* RO */ Loading