Merge "ARM: dts: msm: add missing documentation for UFS PHY clocks"

- #phy-cells        : This property shall be set to 0

- vdda-phy-supply   : phandle to main PHY supply for analog domain

- vdda-pll-supply   : phandle to PHY PLL and Power-Gen block power supply

- clocks	    : List of phandle and clock specifier pairs

- clock-names	    : List of clock input name strings sorted in the same

		      order as the clocks property. "ref_clk_src",

		      "ref_clk_parent", "ref_clk", "tx_iface_clk" &

		      "rx_iface_clk" are mandatory

Optional properties:

- vdda-phy-max-microamp : specifies max. load that can be drawn from phy supply

		vdda-pll-supply = <&pma8084_l12>;

		vdda-phy-max-microamp = <50000>;

		vdda-pll-max-microamp = <1000>;

		clock-names = "ref_clk_src",

			"ref_clk_parent",

			"ref_clk",

			"tx_iface_clk",

			"rx_iface_clk";

		clocks = <&clock_rpm clk_ln_bb_clk>,

			<&clock_gcc clk_pcie_1_phy_ldo >,

			<&clock_gcc clk_ufs_phy_ldo>,

			<&clock_gcc clk_gcc_ufs_tx_cfg_clk>,

			<&clock_gcc clk_gcc_ufs_rx_cfg_clk>;

	};

	ufshc@0xfc598000 {