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Commit c4df00ae authored by Roger Quadros's avatar Roger Quadros
Browse files

mfd: omap-usb-host: clean up omap_usbhs_init() 



We split initializing revision 1 and revision 2 into different
functions. Initialization is now done dynamically so that only
the number of ports available on the system are initialized.

Signed-off-by: default avatarRoger Quadros <rogerq@ti.com>
Reviewed-by: default avatarFelipe Balbi <balbi@ti.com>
parent c6cd087e

drivers/mfd/omap-usb-host.c

+81 −48
Original line number Diff line number Diff line
@@ -358,6 +358,75 @@ static int usbhs_runtime_suspend(struct device *dev) 
	return 0;

}



static unsigned omap_usbhs_rev1_hostconfig(struct usbhs_hcd_omap *omap,

						unsigned reg)

{

	struct usbhs_omap_platform_data	*pdata = omap->pdata;

	int i;



	for (i = 0; i < omap->nports; i++) {

		switch (pdata->port_mode[i]) {

		case OMAP_USBHS_PORT_MODE_UNUSED:

			reg &= ~(OMAP_UHH_HOSTCONFIG_P1_CONNECT_STATUS << i);

			break;

		case OMAP_EHCI_PORT_MODE_PHY:

			if (pdata->single_ulpi_bypass)

				break;



			if (i == 0)

				reg &= ~OMAP_UHH_HOSTCONFIG_ULPI_P1_BYPASS;

			else

				reg &= ~(OMAP_UHH_HOSTCONFIG_ULPI_P2_BYPASS

								<< (i-1));

			break;

		default:

			if (pdata->single_ulpi_bypass)

				break;



			if (i == 0)

				reg |= OMAP_UHH_HOSTCONFIG_ULPI_P1_BYPASS;

			else

				reg |= OMAP_UHH_HOSTCONFIG_ULPI_P2_BYPASS

								<< (i-1);

			break;

		}

	}



	if (pdata->single_ulpi_bypass) {

		/* bypass ULPI only if none of the ports use PHY mode */

		reg |= OMAP_UHH_HOSTCONFIG_ULPI_BYPASS;



		for (i = 0; i < omap->nports; i++) {

			if (is_ehci_phy_mode(pdata->port_mode[i])) {

				reg &= OMAP_UHH_HOSTCONFIG_ULPI_BYPASS;

				break;

			}

		}

	}



	return reg;

}



static unsigned omap_usbhs_rev2_hostconfig(struct usbhs_hcd_omap *omap,

						unsigned reg)

{

	struct usbhs_omap_platform_data	*pdata = omap->pdata;

	int i;



	for (i = 0; i < omap->nports; i++) {

		/* Clear port mode fields for PHY mode */

		reg &= ~(OMAP4_P1_MODE_CLEAR << 2 * i);



		if (is_ehci_tll_mode(pdata->port_mode[i]) ||

				(is_ohci_port(pdata->port_mode[i])))

			reg |= OMAP4_P1_MODE_TLL << 2 * i;

		else if (is_ehci_hsic_mode(pdata->port_mode[i]))

			reg |= OMAP4_P1_MODE_HSIC << 2 * i;

	}



	return reg;

}



static void omap_usbhs_init(struct device *dev)

{

	struct usbhs_hcd_omap		*omap = dev_get_drvdata(dev);
@@ -389,54 +458,18 @@ static void omap_usbhs_init(struct device *dev) 
	reg |= OMAP4_UHH_HOSTCONFIG_APP_START_CLK;

	reg &= ~OMAP_UHH_HOSTCONFIG_INCRX_ALIGN_EN;



	if (is_omap_usbhs_rev1(omap)) {

		if (pdata->port_mode[0] == OMAP_USBHS_PORT_MODE_UNUSED)

			reg &= ~OMAP_UHH_HOSTCONFIG_P1_CONNECT_STATUS;

		if (pdata->port_mode[1] == OMAP_USBHS_PORT_MODE_UNUSED)

			reg &= ~OMAP_UHH_HOSTCONFIG_P2_CONNECT_STATUS;

		if (pdata->port_mode[2] == OMAP_USBHS_PORT_MODE_UNUSED)

			reg &= ~OMAP_UHH_HOSTCONFIG_P3_CONNECT_STATUS;

	switch (omap->usbhs_rev) {

	case OMAP_USBHS_REV1:

		omap_usbhs_rev1_hostconfig(omap, reg);

		break;



	case OMAP_USBHS_REV2:

		omap_usbhs_rev2_hostconfig(omap, reg);

		break;



		/* Bypass the TLL module for PHY mode operation */

		if (pdata->single_ulpi_bypass) {

			dev_dbg(dev, "OMAP3 ES version <= ES2.1\n");

			if (is_ehci_phy_mode(pdata->port_mode[0]) ||

				is_ehci_phy_mode(pdata->port_mode[1]) ||

					is_ehci_phy_mode(pdata->port_mode[2]))

				reg &= ~OMAP_UHH_HOSTCONFIG_ULPI_BYPASS;

			else

				reg |= OMAP_UHH_HOSTCONFIG_ULPI_BYPASS;

		} else {

			dev_dbg(dev, "OMAP3 ES version > ES2.1\n");

			if (is_ehci_phy_mode(pdata->port_mode[0]))

				reg &= ~OMAP_UHH_HOSTCONFIG_ULPI_P1_BYPASS;

			else

				reg |= OMAP_UHH_HOSTCONFIG_ULPI_P1_BYPASS;

			if (is_ehci_phy_mode(pdata->port_mode[1]))

				reg &= ~OMAP_UHH_HOSTCONFIG_ULPI_P2_BYPASS;

			else

				reg |= OMAP_UHH_HOSTCONFIG_ULPI_P2_BYPASS;

			if (is_ehci_phy_mode(pdata->port_mode[2]))

				reg &= ~OMAP_UHH_HOSTCONFIG_ULPI_P3_BYPASS;

			else

				reg |= OMAP_UHH_HOSTCONFIG_ULPI_P3_BYPASS;

		}

	} else if (is_omap_usbhs_rev2(omap)) {

		/* Clear port mode fields for PHY mode*/

		reg &= ~OMAP4_P1_MODE_CLEAR;

		reg &= ~OMAP4_P2_MODE_CLEAR;



		if (is_ehci_tll_mode(pdata->port_mode[0]) ||

			(is_ohci_port(pdata->port_mode[0])))

			reg |= OMAP4_P1_MODE_TLL;

		else if (is_ehci_hsic_mode(pdata->port_mode[0]))

			reg |= OMAP4_P1_MODE_HSIC;



		if (is_ehci_tll_mode(pdata->port_mode[1]) ||

			(is_ohci_port(pdata->port_mode[1])))

			reg |= OMAP4_P2_MODE_TLL;

		else if (is_ehci_hsic_mode(pdata->port_mode[1]))

			reg |= OMAP4_P2_MODE_HSIC;

	default:	/* newer revisions */

		omap_usbhs_rev2_hostconfig(omap, reg);

		break;

	}



	usbhs_write(omap->uhh_base, OMAP_UHH_HOSTCONFIG, reg);