Loading drivers/net/ethernet/msm/emac/emac_main.c +7 −14 Original line number Diff line number Diff line Loading @@ -827,26 +827,21 @@ static irqreturn_t emac_interrupt(int irq, void *data) int max_ints = EMAC_MAX_HANDLED_INTRS; u32 isr, status; /* disable the interrupt */ emac_reg_w32(hw, EMAC, irq_info->mask_reg, 0); wmb(); do { isr = emac_reg_r32(hw, EMAC, irq_info->status_reg); status = isr & irq_info->mask; if (status == 0) { emac_reg_w32(hw, EMAC, irq_info->status_reg, 0); wmb(); if (max_ints != EMAC_MAX_HANDLED_INTRS) return IRQ_HANDLED; return IRQ_NONE; } if (status == 0) break; /* ack PHY interrupt */ if (status & ISR_GPHY_LINK) emac_hw_ack_phy_intr(hw); /* Ack MAC interrupt and disable the interrupt */ emac_reg_w32(hw, EMAC, irq_info->status_reg, status | DIS_INT); wmb(); if (status & ISR_ERROR) { emac_warn(adpt, intr, "isr error status 0x%x\n", status & ISR_ERROR); Loading @@ -861,8 +856,6 @@ static irqreturn_t emac_interrupt(int irq, void *data) if ((status & irq_info->rxque->intr)) { if (napi_schedule_prep(&irq_info->rxque->napi)) { irq_info->mask &= ~irq_info->rxque->intr; emac_reg_w32(hw, EMAC, irq_info->mask_reg, irq_info->mask); __napi_schedule(&irq_info->rxque->napi); } } Loading Loading @@ -892,7 +885,7 @@ static irqreturn_t emac_interrupt(int irq, void *data) } while (--max_ints > 0); /* enable the interrupt */ emac_reg_w32(hw, EMAC, irq_info->status_reg, 0); emac_reg_w32(hw, EMAC, irq_info->mask_reg, irq_info->mask); wmb(); return IRQ_HANDLED; } Loading Loading
drivers/net/ethernet/msm/emac/emac_main.c +7 −14 Original line number Diff line number Diff line Loading @@ -827,26 +827,21 @@ static irqreturn_t emac_interrupt(int irq, void *data) int max_ints = EMAC_MAX_HANDLED_INTRS; u32 isr, status; /* disable the interrupt */ emac_reg_w32(hw, EMAC, irq_info->mask_reg, 0); wmb(); do { isr = emac_reg_r32(hw, EMAC, irq_info->status_reg); status = isr & irq_info->mask; if (status == 0) { emac_reg_w32(hw, EMAC, irq_info->status_reg, 0); wmb(); if (max_ints != EMAC_MAX_HANDLED_INTRS) return IRQ_HANDLED; return IRQ_NONE; } if (status == 0) break; /* ack PHY interrupt */ if (status & ISR_GPHY_LINK) emac_hw_ack_phy_intr(hw); /* Ack MAC interrupt and disable the interrupt */ emac_reg_w32(hw, EMAC, irq_info->status_reg, status | DIS_INT); wmb(); if (status & ISR_ERROR) { emac_warn(adpt, intr, "isr error status 0x%x\n", status & ISR_ERROR); Loading @@ -861,8 +856,6 @@ static irqreturn_t emac_interrupt(int irq, void *data) if ((status & irq_info->rxque->intr)) { if (napi_schedule_prep(&irq_info->rxque->napi)) { irq_info->mask &= ~irq_info->rxque->intr; emac_reg_w32(hw, EMAC, irq_info->mask_reg, irq_info->mask); __napi_schedule(&irq_info->rxque->napi); } } Loading Loading @@ -892,7 +885,7 @@ static irqreturn_t emac_interrupt(int irq, void *data) } while (--max_ints > 0); /* enable the interrupt */ emac_reg_w32(hw, EMAC, irq_info->status_reg, 0); emac_reg_w32(hw, EMAC, irq_info->mask_reg, irq_info->mask); wmb(); return IRQ_HANDLED; } Loading