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Commit c4a147f1 authored by Viswanadha Raju Thotakura's avatar Viswanadha Raju Thotakura
Browse files

ARM: dts: msm: Add 19.2Mhz clock plan support to cci_clk_src 



Current minimum clock is at 50MHz, update the clock to support
CCI requirements, update the cci node with 19.2MHz clock.

Change-Id: I3699d106e58b04b2e4ef4216233d671645f5c351
Signed-off-by: default avatarViswanadha Raju Thotakura <viswanad@codeaurora.org>
parent d5fc7ff6

arch/arm/boot/dts/qcom/msm8994-camera.dtsi

+1 −1
Original line number Diff line number Diff line
@@ -424,7 +424,7 @@ 
		clock-names = "camss_top_ahb_clk", "cci_src_clk",

			"cci_ahb_clk", "camss_cci_clk",

			"camss_ahb_clk";

		qcom,clock-rates = <0 50000000 0 0 0 0>;

		qcom,clock-rates = <0 19200000 0 0 0 0>;

		pinctrl-names = "cci_default", "cci_suspend";

			pinctrl-0 = <&cci0_active &cci1_active>;

			pinctrl-1 = <&cci0_suspend &cci1_suspend>;

drivers/clk/qcom/clock-mmss-8994.c

+1 −0
Original line number Diff line number Diff line
@@ -730,6 +730,7 @@ static struct rcg_clk ocmemnoc_clk_src = { 
};



static struct clk_freq_tbl ftbl_cci_clk_src[] = {

	F_MM(  19200000,        mmsscc_xo,    1,    0,     0),

	F_MM(  50000000,     mmsscc_gpll0,   12,    0,     0),

	F_MM( 100000000,     mmsscc_gpll0,    6,    0,     0),

	F_END